Bus arrangement for a driver of a matrix display

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reexamination Certificate

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Details

C345S055000, C345S058000, C345S213000, C345S089000

Reexamination Certificate

active

06825836

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to a bus arrangement for display devices and particularly to a system for applying brightness signals to pixels of a display device, such as a liquid crystal display (LCD) or a plasma display,
2. Background of the Invention
Display devices, such as liquid crystal displays or plasma displays, are composed of a matrix or an array of pixels arranged horizontally in rows and vertically in columns. The video information to be displayed is applied as brightness (gray scale) signals to data lines which are individually associated with each column of pixels. The rows of pixels are sequentially scanned and the capacitances of the pixels within the activated row are charged to the various brightness levels in accordance with the levels of the brightness signals applied to the individual columns.
Brightness information to be applied to the array of pixels may be formatted into M brightness information signals developed in M parallel brightness information carrying conductors, for example, M=100. The M brightness information signals are applied to an input port of an input demultiplexer of the array. During each horizontal line interval of the video signal, the demultiplexer converts the M brightness information signals to MXN signals developed in MXN parallel conductors that are coupled via MXN data line drives to MXN column conductors of the array. The input demultiplexer may be formed by MXN thin film transistor (TFT's). Groups of M parallel conductors are successively selected, during each horizontal line interval of the video signal. The selection of each group of M parallel conductors is obtained by selection pulse signals developed in a bus of N parallel conductors.
The capacitance of the input bussing structure associated with the N selection parallel conductors and the input bussing structure associated with the M brightness information carrying parallel conductors can be a major source of both power dissipation and yield loss, especially for higher resolution self-scanned Active-Matrix Liquid Crystal Displays (AMLCDs). Long metal runs across the display and multiple crossovers (Source/Drain metal-to-Gate metal) cause significant capacitive loads, resulting in both capacitance shorting failures, unwanted crosstalk among the brightness information carrying conductors and excessive dynamic power dissipation. It is desirable to reduce the number of crossovers of the input bussing structure associated with the N selection parallel conductors and of the input bussing structure associated with the M brightness information carrying parallel conductors.
SUMMARY OF THE PRESENT INVENTION
An arrangement, embodying an inventive feature, for transferring pixel information with respect to pixels arranged in columns and rows of an array of a display device includes semiconductor switches. Each switch has a first terminal, a second terminal and a third terminal. A first buss is coupled to a first plurality of terminals for communicating signals between the first plurality of terminals and the first terminals of the switches. Local busses that are separated from one another are provided. A given local buss has a first buss section coupled to a second plurality of terminals associated with the given local buss and extends in a manner to cross over the first buss. The local buss has a second buss section extending from the first buss section has conductors coupled in a local, clustering buss arrangement to the second terminals of switches associated with the given local buss. The associated switches have their third terminals coupled to consecutively disposed column conductors, respectively, of the array.


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