Bus agent utilizing dynamic biasing circuitry to translate a...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Reexamination Certificate

active

06608515

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to the field of input conditioning circuitry with dynamic biasing. More particularly, one embodiment of the present invention pertains to utilizing dynamic feedback from an input signal to reduce the input signal to within a desired voltage range.
2. Description of Related Art
Since advances in semiconductor fabrication techniques enable semiconductor manufacturers to design new and improved semiconductor devices at a fast pace, circuitry which allows such new devices to be employed in systems utilizing older semiconductor devices may be quite advantageous. If such circuitry is available, system manufacturers may be able to upgrade different components of a system without requiring a complete system redesign. One example is microprocessor technology, where microprocessors designed using new fabrication processes may be available before other components such as chipsets are manufactured on similar processes.
One major impediment to using devices fabricated on older semiconductor fabrication processes with devices fabricated on newer processes is that the operating voltage for devices fabricated using newer processes is typically lower than the operating voltages for devices fabricated on older processes. The difference in operating voltages is due, in part, to the fact that individual transistors are smaller and oxide thicknesses (e.g., gate oxides) are thinner. Typically, an electrical oxide (EOS) voltage is used to specify a voltage for a process which, if exceeded, may damage transistors. Thus, newer processes generally have lower EOS voltages than their predecessors.
While the smaller devices and thinner oxides are generally desirable since speed is typically increased and power dissipation is typically decreased, the ability to tolerate high voltages, as measured by the EOS voltage, is disadvantageously reduced. Thus, in order to use devices fabricated on new semiconductor processes in systems including older devices, it may be necessary to protect the new devices from the voltage levels at which the older devices generate signals. This protection may be accomplished by conditioning input signals (e.g., lowering their voltage levels).
In order to maintain system compatibility, prior art input signal conditioning has been done both onboard and separately from the new device. When onboard signal conditioning is used, a core portion of a device may operate at a low voltage and a periphery portion may perform the input conditioning, perhaps utilizing the core voltage and other voltage supplies. The core only receives signals approximately within the core operating voltage range, so there is no problem with EOS after signals have been conditioned in the periphery. Such onboard conditioning may allow the newer device to be plug-in compatible with older devices, meaning that little or no change is required to substitute the newer component for the older.
One prior art technique of conditioning input signals involves the use of a resistive divider circuit in conjunction with capacitors in parallel to the resistors. With a resistive divider, a “safe” voltage level (i.e., one which does not exceed the semiconductor's EOS limit) may be produced; however, the resistors and capacitors typically consume large amounts of silicon area and introduce undesirable delay characteristics. Furthermore, the resistors consume static power, which is especially undesirable in low power systems where devices fabricated on new semiconductor processes are often employed. Thus, the prior art does not provide an adequately fast and compact circuitry which can rapidly provide signals to a device core operating at a low voltage when a higher voltage signal is received.
SUMMARY
A dynamic feedback bias circuit is disclosed. A system utilizing the dynamic bias circuit includes a first bus agent and a second bus agent. The first bus agent generates a first signal having a first voltage swing. The second bus agent has a core which operates at a core operating voltage, the core operating voltage having an amplitude less than the first voltage swing. The second bus agent has an input device which receives the first signal from the first bus agent. The input device of the second bus agent is biased by the dynamic feedback bias circuit to provide a core signal with a voltage swing approximately equal to or less than the core operating voltage.


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Connor, John, et al. “Dynamic Dielectric Protection for I/O Circuits Fabricated in a 2.5V CMOS Technology Interfacing to a 3.3V LVTTL Bus,” 1997 Symposium on VLSI Circuits Digest of Technical Papers, pp. 119-120.

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