Bus activity sequence controller

Details Bus activity sequence controller Bus activity sequence controller

1987-06-03

1990-01-23

Chan, Eddie P.

Boots, shoes, and leggings

36424233, 3642411, G06F 1332

Patent

active

048962660

ABSTRACT:
The present invention relates to a computer system having a sequence controller for allowing direct memory access devices to access peripheral devices. The sequence controller allows the peripheral devices access to a global bus by providing access in a round-robin fashion. A microprocessor associated with the sequence controller and direct memory access has access to the global bus after each direct memory access. The amount of data allowed to be transferred in each direct memory access is restricted so that each device is equally serviced.

REFERENCES:
patent: 4292668 (1981-09-01), Miller et al.
patent: 4417304 (1983-11-01), Dinwiddie, Jr.
patent: 4490788 (1984-12-01), Rasmusson
patent: 4688166 (1987-08-01), Schneider
patent: 4760515 (1988-07-01), Malmquist et al.

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