Bus acquisition system

Multiplex communications – Wide area network – Packet switching

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3408255, H04J 302

Patent

active

047363665

ABSTRACT:
A bus communication system is disclosed which provides low bus acquisition latency while supporting large block data transfers. A first device, which has control of a communication bus, detects a request for control of the bus during a transfer of the data to a second device. The first device then determines whether the transfer of data can be completed within a predetermined time period. A suspend signal is generated and transmitted to the second device in the event that the transfer of data cannot be completed within the predetermined period of time. The second device, in response to the suspend signal, sends to the first device, a plurality of control words which sets forth the information that the servant unit will require from the bus master to identify and resume the message at a later time. The first device stores the control words and relinquishes control of the bus. Thereafter, when the first device regains control of the bus, it transmits to a second device the control words and then resumes the transmission of the suspended data.

REFERENCES:
patent: 4295122 (1981-10-01), Hatada et al.
patent: 4320457 (1982-03-01), Tanikawa
patent: 4464749 (1984-08-01), Ulug
patent: 4503533 (1985-03-01), Tobagi et al.
patent: 4510599 (1985-04-01), Ulug
patent: 4517670 (1985-05-01), Ulug
patent: 4535448 (1985-08-01), Baxter et al.
patent: 4542380 (1985-09-01), Beckner et al.
patent: 4593282 (1986-06-01), Acampora et al.
patent: 4626843 (1986-12-01), Szeto et al.
IBM Technical Disclosure Bulletin, Bederman, "Decentralized Interrupt Logic for Multi Processor Systems Using Relative Addressing of Register Space" vol. 21, No. 11, Apr. 1979, pp. 4519-4523.
IBM Technical Disclosure Bulletin, Korte, "Multi Tasking Micro Process Level Instructions" vol. 26, No. 6, Nov. 1983, pp. 2881-2882.
IBM Technical Disclosure Bulletin, Lotspiech, et al., Generalized Interrupt Handler for a Forth Machine", vol. 26, No. 7A, pp. 3839-3844.

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