Communications: electrical – Digital comparator systems
Patent
1976-10-12
1977-11-22
Atkinson, Charles E.
Communications: electrical
Digital comparator systems
3401461AL, G06F 1112
Patent
active
040598250
ABSTRACT:
A shortened cyclic block decoder and a method of decoding encoded cyclic blocks of data of the type (n,k) are described. The invention can correct burst errors of either a synchronous or asynchronous variety imbedded within the received block where the total adjusted error burst length is b and the number of bit slippages of either an insertion or deletion variety contained within the error burst is d, such that d<D.ltoreq.B<n-k and E.gtoreq.n+D; where B and D are independent design parameters of the device, E is the exponent of the code's generating polynomial, n is the block length, and k is the number of information bits, n>k.
REFERENCES:
patent: 3550082 (1970-12-01), Tong
patent: 3571794 (1971-03-01), Tong
patent: 3938086 (1976-02-01), Valbonesi
patent: 3961311 (1976-06-01), Pavoni et al.
Atkinson Charles E.
Jaskiewicz Edmund M.
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