Burst page access unit usable in a synchronous DRAM and other se

Details Burst page access unit usable in a synchronous DRAM and other se Burst page access unit usable in a synchronous DRAM and other se

1997-08-05

2000-02-15

Nelms, David C.

Static information storage and retrieval

Addressing

Byte or page addressing

36518912, 365233, 365235, G11C 800

Patent

active

060260556

ABSTRACT:
A burst page access unit for a semiconductor memory device which has a plurality of memory cell arrays for storing bit data therein. The burst page access unit comprises a row decoder for decoding a row address signal from an address input line in response to a row address strobe signal to select a desired one of the memory cell arrays, an internal address counter for incrementing a column address signal from the address input line by one in response to a column address strobe signal to generate an internal column address signal, and a column decoding circuit for decoding the internal column address signal from the internal address counter to select a desired one of memory cells in the memory cell array selected by the row decoder. According to the present invention, the burst page access unit can enhance the successive data access speed to increase the bandwidth of the semiconductor memory device.

REFERENCES:
patent: 5487049 (1996-01-01), Hang
patent: 5526320 (1996-06-01), Zagar et al.
patent: 5530955 (1996-06-01), Kaneko

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