Burst mode cache with wrap-around fill

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3642434, 3642602, G06F 1328

Patent

active

049126318

ABSTRACT:
A method of up-dating a cache (10) backed by a main memory (12). The cache is used as an intermediate high-speed memory between the main memory and a data processing unit (14). A burst mode request is for multiple words (k through n) included in an m-word line of data words (1 through m). The transfer takes place by first determining if the requested data words (k through n) reside in the cache. If they do, then the requested words (k through n) are transferred from the cache to the data processing unit. If they do not, then the requested words (k through n) are transferred simultaneously from the main memory both to the cache and to the data processing unit to thereby update the cache. This cache update is accomplished by first writing the last words of the line containing the requested words only to the cache (starting at word n+1 and ending at word k-1) and then writing the remaining words comprising the requested words (k through n) to the cache and the data processing unit simultaneously (starting at word k and ending at word n).

REFERENCES:
patent: 3705388 (1972-12-01), Nishimoto
patent: 4317168 (1982-02-01), Messina et al.
patent: 4586133 (1986-04-01), Steckler
patent: 4779193 (1988-10-01), Koga et al.
patent: 4796222 (1989-01-01), Aichelmann et al.
patent: 4797813 (1989-01-01), Igarashi

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