Burst error corrector

Excavating

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371 377, G06F 1110

Patent

active

054917018

ABSTRACT:
A burst error correction system comprising a CRC generator/checker; a syndrome/ECC generator; and an error corrector. Using codeword data, the CRC generator/checker generates m number of CRC bytes. The CRC bytes are shifted out to the syndrome/ECC generator for use in the generation of a plurality of ECC bytes. In a write operation, syndrome/ECC generator groups the data bytes and the CRC bytes for each codeword into a predetermined number of interleaves. The ECC bytes are generated so that the sum of the bytes in each interleave for a codeword is zero, and so that the ECC bytes generated by the syndrome/ECC generator constitute at least L number of consecutive roots of the codeword. The syndrome/ECC generator comprises an interleave dependent ECC factor subgenerator and two interleave independent ECC factor subgenerators. In the general processing of a read codeword, in a first state of operation the entire codeword is inputted, for regenerating CRC bytes (and adding the regenerated bytes to the received CRC bytes of the codeword, thereby yielding CRC check remainder bytes) and for generating syndromes. The syndromes are utilized to determine if the codeword is correct or if an error burst has occurred. When a portion of an error burst occurs in the data portion, a data error burst processing and correction state is begun. When a portion of the error burst occurs in the CRC portion, a CRC error burst processing state is begun.

REFERENCES:
patent: 4680764 (1987-07-01), Suzuki et al.
patent: 4782490 (1988-11-01), Tenengolts
patent: 5157669 (1992-10-01), Yu et al.
patent: 5172380 (1992-12-01), Odaka
patent: 5241546 (1993-08-01), Peterson et al.
Chang et al., "Cyclic Memory Record Format Without Intrarecord Gaps", IBM Technical Disclosure Bulletin, vol. 19, No. 10, pp. 3890-3891, Mar. 1977.

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