Burn-in technologies for unpackaged integrated circuits

Details Burn-in technologies for unpackaged integrated circuits Burn-in technologies for unpackaged integrated circuits

1993-05-06

1995-03-14

Nguyen, Vinh

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324758, G01R 3102

Patent

active

053979974

ABSTRACT:
A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

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