Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Patent
1997-03-31
1998-06-02
Kincaid, Kristine P.
Electricity: conductors and insulators
Boxes and housings
Hermetic sealed envelope type
174 523, 257683, 257704, 338 22R, 338234, H02G 308
Patent
active
057603367
ABSTRACT:
A circuit package for a varistor chip includes a housing made of an electrical insulating and burn-resistant composition. The housing includes a surrounding wall with upright front and rear wall portions and opposite side wall portions which interconnect the front and rear wall portions and which have lower sections that are formed with aligned pairs of wire holes, and a bottom wall connected to a bottom end of the surrounding wall. Each of two electrical contact pieces is disposed inside the housing and is located adjacent to a respective one of the front and rear wall portions of the surrounding wall. The contact pieces receive the varistor chip therebetween and are provided with contact portions that abut against the varistor chip. Each of the contact pieces has opposite sides formed with a pair of contact tabs. Each of the contact tabs is juxtaposed with a respective one of the wire holes and is used to establish external electrical connection with the varistor chip. A cover plate is mounted on a top end of the surrounding wall to seal the housing.
REFERENCES:
patent: 4399452 (1983-08-01), Nakashima et al.
patent: 4664281 (1987-05-01), Falk et al.
patent: 4939498 (1990-07-01), Yamada et al.
patent: 5142265 (1992-08-01), Motoyoshi et al.
patent: 5233326 (1993-08-01), Motoyoshi
Kincaid Kristine P.
Ngo Hung V.
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