Buried word line memory integrated circuit system

Details Buried word line memory integrated circuit system Buried word line memory integrated circuit system

2006-11-28

2006-11-28

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Charge transfer device

C257S287000, C257S315000, C257S324000, C257SE29233

Reexamination Certificate

active

07141838

ABSTRACT:
An integrated circuit system includes providing a semiconductor substrate and forming buried word lines in the semiconductor substrate with the buried word lines including vertical charge-trapping dielectric layers. The system further includes forming bit lines further comprising forming in-substrate portions in the semiconductor substrate, and forming above-substrate portions over the semiconductor substrate.

REFERENCES:
patent: 5909618 (1999-06-01), Forbes et al.
patent: 6072209 (2000-06-01), Noble et al.
patent: 6399979 (2002-06-01), Noble et al.
patent: 6448607 (2002-09-01), Hsu et al.

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