Buried layer in a semiconductor formed by bonding

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S618000, C257S622000, C257S623000

Reexamination Certificate

active

06208007

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention.
A semiconductor with a buried blocking or conducting layer is a valuable electronic or optoelectronic element.
This invention relates in general to creating buried layers within a semiconductor. More particularly, the invention is directed to creating metallic or insulating buried layers deep within a semiconductor substrate. The invention is further concerned with lasers formed using such a substrate.
2. Description of Related Art.
The optical fiber and the semiconductor laser have revolutionized the field of information transmission. The development of fiber optic communication systems has been fueled by the growing need for a high bit-rate and high volume communication medium that is more efficient than the coaxial cable. Optical fibers can guide information encoded in light signals uninterrupted over hundreds of kilometers, while the semiconductor laser provides an inexpensive source for such optical transmission.
Presently, optical fibers are being installed around the world: across the land and under the oceans. Both commercial telephone and business communications are being conducted over these links. Such links use a large number of semiconductor lasers to transmit and amplify the signals. Communication applications extend to numerous short distance applications, such as, local area networks, and chip-to-chip communication. Compact disc players and optical storage devices, as well as, laser printing were brought to mass production owing to the inexpensive semiconductor laser. Semiconductor lasers are pushing their way into many other fields where they are replacing large solid state or gas lasers with small devices barely visible to the naked eye.
In recent years, the vertical-cavity laser (VCL) has emerged as a new coherent light source alongside the conventional in-plane laser. This is due to its compactness, inherent single-longitudinal mode operation, circular beam profile and straightforward integration with other electronic circuitry. Vertical-cavity lasers hold promise of superior performance in many optoelectronic applications and lower manufacturing cost than in-plane lasers.
State of the art GaAs-based vertical-cavity lasers operate continuously at room-temperature with sub-100 &mgr;A threshold currents. The outstanding performance of these laser greatly relies on their monolithic fabrication process and the quality of Al(Ga)As/GaAs quarter-wave mirrors, which are presently the highest quality epitaxial mirrors that can be routinely fabricated.
The development of long-wavelength 1.3 &mgr;m and 1.55 &mgr;m vertical-cavity surface-emitting lasers has been driven by the need for low cost, high speed sources for optical communications and interconnects. However, the practical realization of these lasers has been a difficult process over the last decade due to numerous technological difficulties. A significant problem has been the fabrication of mirrors with sufficiently high reflectivity and adequate electrical and thermal properties. It has been recently demonstrated that, using the process of wafer fusion, InGaAsP active layers operating at 1.3 &mgr;m and 1.55 &mgr;m can be bonded to Al(Ga)As/GaAs mirrors, thereby enabling the fabrication of long-wavelength vertical-cavity lasers with mirrors grown on GaAs.
The methods for fabricating a VCL that have high reflectivity mirrors, proper current confinement to the active region of the VCL, and proper VCL structure have, to this point, been expensive and lengthy. The inability to grow GaAs, which is a preferred mirror material, on InP because of improper lattice matching creates problems for InP active layer VCLs. The low yields created by deeply etched well VCLs and the low reflectivity create efficiency and output problems. The use of amorphous silicon reduces the reflectivity of one of the mirrors, also reducing the efficiency and yields for these methods of constructing VCLs.
The creation of buried layers that can block current flow, or, conversely, channel current flow without appreciably affecting the semiconductor currents can be used in numerous semiconductor devices besides VCLs. VLSI devices also experience problems because of interference between layers of the device; buried layers formed via ion implantation are not deep enough into the semiconductor bulk to eliminate the effect on the conductive paths in a VLSI device. VLSI devices are combinations of transistors, diodes, resistors, and capacitors, and therefore, a buried blocking layer can be effective in enhancing the output characteristics of all types of semiconductor devices. Further, the use of buried insulating or conducting layers created via fusion can be used in place of or in conjunction with ion implantation or diffusion techniques to fabricate diodes, transistors, photodetectors, and other discrete and integrated semiconductor devices.
It can be seen then that there is a need for a method of creating a buried layer deep within a semiconductor device. It can also be seen that there is a need for a method of creating buried layers that are insulating in nature, thereby channeling current through certain regions of the semiconductor. There is also a need for a method of creating buried layers that carry current efficiently, thereby leaving the surrounding regions of the semiconductor unaffected.
SUMMARY OF THE INVENTION
To minimize the limitations described above, and other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a powerful device and method for creating a buried layer within a semiconductor device. The present invention is integrable with current fabrication techniques with both crystalline and amorphous substrates.
The present invention minimizes the above-described problems by providing a method for creating a doped region on the surface of a semiconductor wafer, and then by fusing or bonding that surface to another wafer, making that doped region a buried layer.
Further, by etching into the first wafer prior to fusing or bonding, a void may be created within a semiconductor device. The void will be completely surrounded with crystalline semiconductor material. The void may be partially or completely filled with material, either insulating or conductive, depending on the application desired.
A system in accordance with the principles of the present invention comprises creating a doped region within a wafer, where the doped region is exposed to one of the working planes of the wafer, and then fusing or bonding that surface to a second wafer, thus burying the doped region.
Similarly, if an etched area was created in the first wafer, and then the surface with the etched channel was fused to a second wafer, the void created by the etch would be sealed within the semiconductor bulk, having been covered by the second wafer.
One object of the present invention is to channel currents within a semiconductor device. Another object of the present invention is to channel currents within a conductive channel buried in a semiconductor device. Another object is to channel light within a semiconductor device.
These and various other advantages and features of the invention are pointed out with particularity in the claims and form a part hereof. A further understanding of the invention, its advantages, and the objects obtained by its use, is obtained from the following description and the drawings.


REFERENCES:
patent: 4638552 (1987-01-01), Shimbo et al.
patent: 4891329 (1990-01-01), Reisman et al.
patent: 4948748 (1990-08-01), Kitahara et al.
patent: 5286671 (1994-02-01), Kurtz et al.
patent: 5346848 (1994-09-01), Grupen-Shemansky et al.
patent: 5376580 (1994-12-01), Kish et al.
patent: 5390210 (1995-02-01), Fouquet
patent: 5393711 (1995-02-01), Biallas et al.
patent: 5407856 (1995-04-01), Quenzer et al.
patent: 5413951 (1995-05-01), Ohori et al.
patent: 5416044 (1995-05-01), Chino et al.
patent: 5502316 (1996-03-01), Kish et al.
patent: 5513204 (1996-04-01), Jayaraman
patent: 5724376 (1998-03-01), Kish, Jr. et al

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Buried layer in a semiconductor formed by bonding does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buried layer in a semiconductor formed by bonding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buried layer in a semiconductor formed by bonding will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2477906

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.