Buried injector memory cell formed from vertical complementary b

Details Buried injector memory cell formed from vertical complementary b Buried injector memory cell formed from vertical complementary b

1981-06-12

1984-01-10

Edlow, Martin H.

357 49, 357 59, 357 44, H01L 2702

Patent

active

044255748

ABSTRACT:
A vertical pair of complementary, bipolar transistors is disclosed which includes a semiconductor substrate of one conductivity type and a pair of dielectric isolation regions disposed in contiguous relationship with the substrate. An injector region of opposite conductivity type is disposed between the pair of isolation regions. A pair of heavily doped, polycrystalline, semiconductor regions of the one conductivity type is disposed over and in registry with the pair of isolation regions. Similarly, a single crystal, semiconductor region of the one conductivity type is disposed over and in registry with the injector region. Finally, a first zone of opposite conductivity type is disposed in the single crystal region and a second zone of the one conductivity type is disposed in the first zone. To form a memory cell, another vertical pair of complementary, bipolar transistors like those just described is disposed in electrically isolated, spaced relationship with the first mentioned vertical pair of complementary, bipolar transistors. These pairs of transistors are arranged so that an isolation region and a polycrystalline region of each are common. To form the memory cell, the first and second zones of each of the pairs are cross-coupled.
In addition, a method of manufacturing a semiconductor device having vertical complementary, bipolar transistors is disclosed which includes the steps of forming regions of dielectric isolation which are contiguous with a semiconductor substrate and a region of semiconductor of one conductivity type therebetween, the semiconductor substrate being of opposite conductivity type; forming regions of heavily doped, polycrystalline semiconductor of the opposite conductivity type and a region of single crystal semiconductor of the opposite conductivity type in registry with the regions of dielectric isolation and the semiconductor region of one conductivity type, respectively. The method also includes the step of forming a zone of one conductivity type in the region of single crystal semiconductor and a zone of opposite conductivity type in the zone of one conductivity type. The details of each of the above steps are also disclosed. The fabrication of a buried injector, memory cell which includes steps similar to those just described is also disclosed.

REFERENCES:
patent: 4155778 (1979-05-01), Antipov
patent: 4159915 (1979-07-01), Anantha et al.
patent: 4196440 (1980-04-01), Anantha et al.
patent: 4214315 (1980-07-01), Anantha et al.
patent: 4249193 (1981-02-01), Balyoz
patent: 4252582 (1981-02-01), Anantha et al.

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