Buried heterostructure vertical-cavity surface-emitting...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Dopant introduction into semiconductor region

Reexamination Certificate

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C438S046000

Reexamination Certificate

active

06238944

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a vertical cavity surface emitting laser and, more particularly, to a buried impurity source in the barrier layers of the quantum well active region of a vertical cavity surface emitting laser, which after thermal annealing, will diffuse portions of the quantum well active region to laterally confine injected carriers to the non diffused active regions.
Monolithic arrays of solid state semiconductor lasers are very desirable light sources for high-speed laser printing, optical fiber communications and other applications. Recently, there has been an increased interest in vertical cavity surface emitting lasers (“VCSEL's”) although edge emitting lasers are currently used in the vast majority of applications. A common laser structure is a so-called “edge emitting laser” where light is emitted from the edge of a monolithic structure of semiconductor layers. Another type of laser structure is a “VCSEL” where the light is emitted from the surface of the monolithic structure of semiconductor layers.
One reason for the interest in VCSEL's is that edge emitting lasers produce a beam with a large angular divergence, making efficient collection of the emitted beam more difficult. Furthermore, edge emitting lasers cannot be tested until the wafer is cleaved into individual devices, the edges of which form the mirror facets of each device. On the other hand, not only does the beam of a VCSEL have a small angular divergence, a VCSEL emits light normal to the surface of the wafer. In addition, since VCSEL's incorporate the mirrors monolithically in their design, they allow for on-wafer testing and the fabrication of one-dimensional or two-dimensional laser arrays.
One method to fabricate a VCSEL is taught in U.S. Pat. No. 5,915,165 to Sun et al., commonly assigned as the present application and herein incorporated by reference. Several disordering semiconductor layers are deposited adjacent to the active layers during deposition of a laser semiconductor structure. Annealing causes these “buried” disordering layers to spread among the other semiconductor layers to form disordered regions that will bound the vertical laser cavity.
The performance of VCSEL's has improved substantially in recent years. However, the ultimate performance of these improved VCSEL structures may be limited by losses associated with the diffusion of injected carriers laterally out of and away from the active light emitting region of the VCSEL. These losses increase the threshold current of the laser required for light emission from the active region and prevent simple scaling down of the VCSEL size to result in lower current requirements for light emission from the active region of the VCSEL.
It is an object of this invention to provide better definition of the active region of a VCSEL to prevent lateral injected carrier diffusion and decrease the threshold current requirement for light emission from the active region of the VCSEL.
SUMMARY OF THE INVENTION
According to the present invention, the barrier layers within a quantum well active region of a vertical cavity surface emitting laser can be silicon doped. Under thermal annealing, the silicon doped barrier layers will form disordered regions around the remaining non-disordered active regions. The disordered regions of the quantum well active region will prevent diffusion of injected carriers from the non-disordered, light emitting quantum well active region.


REFERENCES:
patent: 5915165 (1999-06-01), Sun et al.
patent: 6061380 (2000-05-01), Jiang et al.

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