Buried collar trench capacitor formed by LOCOS using self...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C438S389000

Reexamination Certificate

active

06995451

ABSTRACT:
A method for manufacturing a trench capacitor that comprises defining a semiconductor substrate, forming a trench with a lower region and an upper region in the semiconductor substrate, forming a buried conductive region around the lower region, forming a first insulating layer along sidewalls of the trench up to a level between the lower region and the upper region, forming a second insulating layer along the sidewalls of the trench at the upper region, the second insulating layer being separated from the first insulating layer by an intermediate region, and forming an oxide on the sidewalls of the trench at the intermediate region.

REFERENCES:
patent: 5142438 (1992-08-01), Reinberg et al.
patent: 6025245 (2000-02-01), Wei
patent: 2003/0123216 (2003-07-01), Yoon et al.
patent: 0 980 100 (2000-02-01), None
Senzaki et al., “Atomic Layer Deposition of High-k Thin Films for Gate and Capacitor Dielectrics,” 2004 International Conference on Integrated Circuit Design and Technology, pp. 269-274.
Gutsche et al., “Capacitance Enhancement Techniques for Sub-100nm Trench DRAMs”, Dec. 2001, Electron Devices meeting 2001 IEDM technical Digest, pp. 18.6.1-18.6.4.
“A model for Al2O3ALD conformity and deposition rate from oxygen precursor reactivity,” G. Prechtl et al., IEDM, 2003, pp. 245-248.

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