Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1991-10-23
1993-07-13
Munson, Gene M.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257508, 257770, H01L 2712
Patent
active
052276589
ABSTRACT:
A method for isolating areas of silicon from a substrate 50 includes the steps of: providing a buried N+ region 52 in the substrate; forming an intrinsic epitaxial layer 12 onto the N+ region; etching trenches 18, 20 through the intrinsic epitaxial layer to thereby form a desired isolation region 16 of intrinsic epitaxial material; laterally etching a cavity 22 underneath the desired isolation region; and, forming an insulation layer 24 of insulation material along the bottom of the desired isolation region exposed by the former etching steps.
REFERENCES:
patent: 4502913 (1985-05-01), Lechaton et al.
patent: 4661832 (1987-04-01), Lechaton et al.
patent: 4888300 (1989-12-01), Burton
"A New SOI Fabrication Technique for Ultrathin Active Layer of Less the 80 nm", by H. Horie, et al., 1990 Symposium on VLSI Technology.
Beyer Klaus D.
Ku San-Mei
Silvestri Victor J.
Yapsir Andrie S.
Balconi-Lamica Michael J.
International Business Machines - Corporation
Munson Gene M.
Romanchik Richard A.
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