Bumping technology in stacked die configurations

Details Bumping technology in stacked die configurations Bumping technology in stacked die configurations

2005-01-25

2005-01-25

Chambliss, Alonzo (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S724000, C257S725000, C257S777000, C257S784000, C257S786000, C257S787000

Reexamination Certificate

active

06847105

ABSTRACT:
A stacked semiconductor package including a plurality of stacked semiconductor devices on a substrate, and a method of forming the same. The semiconductor devices are stacked in an active surface-to-backside configuration. The top semiconductor die is flipped over to face the active surface of the semiconductor die directly below. An electrical connector can extend from a bond pad on the top semiconductor die to a redistribution circuit on the semiconductor die below. The redistribution circuit can be electrically connected to a substrate. Alternatively, an electrical connector extends from a bond pad on top semiconductor die to a bond pad on a substrate.

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