Bump structure for testing liquid crystal display panel and...

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

Reexamination Certificate

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C324S1540PB

Reexamination Certificate

active

06798232

ABSTRACT:

The present invention claims the benefit of Korean Patent Application No. 86065/2002 filed in Korea on Dec. 28, 2002, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bump structure for testing a liquid crystal display panel and a method of fabricating a bump structure, and more particularly, to a bump structure for testing a liquid crystal display panel that can test the liquid crystal display panel after a driver integrated circuit (IC) is mounted.
2. Description of the Related Art
In general, display devices need to have low power consumption, high picture quality, thin profile, and light weight. Presently, liquid crystal display (LCD) devices are replacing conventional cathode ray tubes (CRTs). The liquid crystal display devices display an image by making use of an optical anisotropy of liquid crystal molecules, and the LCD devices include an upper substrate, a lower substrate, and a liquid crystal material layer formed therebetween. The upper substrate includes a color filter having sub-color filters R (red), G (green), and B (blue), a black matrix that divides the sub-color filters and shields light, and a transparent common electrode that supplies a voltage to a liquid crystal cell of the liquid crystal display device. In addition, the lower substrate includes a pixel region, a pixel electrode formed within the pixel region, and a thin film transistor (TFT) that functions as a switching device.
The upper and lower substrates are attached to each other by a sealant, thereby forming a liquid crystal display panel. Presently, the upper and lower substrates are commonly attached by an attachment key formed on one of the upper or lower substrates. Then, liquid crystal material is injected between the upper and lower substrates via an injection port, and the injection port is closed. Next, the liquid crystal display panel is tested by application of an electric field across the liquid crystal material via the common and pixel electrodes. Based upon results of the test, the liquid crystal display panel is determined to be functionally acceptable or defective.
After the test, a driving circuit that includes a driver IC is installed in the liquid crystal display panel, and is connected to gate and data pads by one of a tape carrier package (TCP) method or a chip-on-glass (COG) method. The driving circuit utilizes a printed circuit board (PCB) configuration such that surface mounting technology (SMT) is used. Thus, circuitry components can be thin and can be mounted with a high density.
The TCP method includes mounting the driver IC chip on an anisotropic conductive film of high polymer having a width of 35 mm or 48 mm. To perform the TCP method, the conductive film is attached on an electrode of the liquid crystal display panel, and a compression process is performed using heat. Accordingly, the amounts of heat and pressure have to be properly applied.
The COG method includes direct mounting the driver IC on a glass substrate of the liquid crystal display panel using a bump technology that is significantly different from the TCP method for mounting the driver IC onto the conductive film. Thus, the COG method can reduce production costs since the TCP is not required. However, using the COG method increases a size of the glass substrate of the liquid crystal display panel.
FIG. 1
is a partial plan view of a liquid crystal display panel of a TCP method according to the related art. In
FIG. 1
, a liquid crystal display panel
10
is formed by attaching an array substrate
20
and a color filter substrate
50
. The array substrate
20
is divided into a first region
55
that corresponds to the color filter substrate
50
and a second region
25
of an outer periphery of the array substrate
20
that does not correspond to the color filter substrate
50
. In addition, the array substrate
20
includes a gate line
30
and a data line
40
arranged along horizontal and vertical directions, respectively, and a switching device, such as a thin film transistor (not shown), is formed at an intersection region between the gate and data lines
30
and
40
.
Pads (not shown) are formed at end portions of the gate and data lines
30
and
40
, and are located at the second region
25
of the array substrate
20
. A horizontal pad constitutes a data pad that is connected to the data line
40
, and a vertical pad constitutes a gate pad that is connected to the gate line
30
. In addition, the array substrate
20
is formed to be a little larger than the color filter substrate
50
to accommodate the gate and data pads. Moreover, the liquid crystal display device includes a print circuit substrate
70
, a TCP
80
for connecting the print circuit substrate
70
to the liquid crystal display panel
10
, and a data transmitting line
75
for transmitting a gate signal to a gate driver IC
85
.
FIG. 2
is a partial plan view of a liquid crystal display panel of a COG method according to the related art. In
FIG. 2
, at the second region
25
of the periphery of the array substrate
20
, a gate driver IC chip
93
is connected to the gate line
30
and a data driver IC chip
94
is connected to the data line
40
are mounted. In addition, input lines
91
are connected to input terminals (not shown) of the data driver IC chip
94
and the gate driver IC chip
93
formed on a flexible printed circuit (FPC)
90
.
With the COG method, although not shown, an input pad and an output pad are formed at a region where the driver IC chips
93
and
94
are to be mounted. The input pad receives a driving signal from the FPC
90
that is connected to the liquid crystal display panel
10
, and the output pad outputs the driving signal to the gate line
30
or the data line
40
. In addition, the liquid crystal display panel of the COG method is provided with a pad for testing (not shown) the liquid crystal display panel before the driver IC chips
93
and
94
are mounted.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a bump structure for testing a liquid crystal display panel that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a structure for testing a liquid crystal display panel during each fabrication process after mounting of a driver IC.
Another object of the present invention is to provide a method for fabricating a structure for testing a liquid crystal display panel.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, a bump structure for testing a liquid crystal display panel includes a plurality of pads arranged at a pad region along an edge portion of a liquid crystal display panel and connected to one of gate lines and data lines, a plurality of driver ICs are arranged to be electrically connected to the plurality of pads, and a test bump electrically connected to at least one of the plurality of pads and arranged at the pad region except within a region where driver ICs are mounted.
In another aspect, a method of fabricating a bump structure for testing a liquid crystal display panel includes forming a plurality of pads arranged at a pad region along an edge portion of a liquid crystal display panel and connected to one of gate lines and data lines, mounting a plurality of driver ICs to be electrically connected to the plurality of pads, and connecting a test bump to at least one of the plurality of pads and arranged at the pad region except within a region where driver ICs are mounted.
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