Bump for semiconductor package, semiconductor package...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S738000, C257S778000, C438S613000, C438S108000

Reexamination Certificate

active

10976427

ABSTRACT:
The present invention discloses a bump for a semiconductor package, a semiconductor package applying the bump, and a method for fabricating the semiconductor package. As a second bump unit contacting an electrode terminal of a PCB has a smaller width than a first bump unit contacting an electrode pad of a semiconductor chip through a metal adhering layer, even if a pitch between the electrode pads of the semiconductor chip does not correspond to the pitch between the electrode terminals of the PCB, contact reliability is improved by the bump. In addition, the bump does not contact lines adjacent to the electrode terminal of the PCB, thereby preventing a mis-operation of the semiconductor package. Accordingly, the pitch between the electrode pads of the semiconductor chip and the pitch between the bumps can be minimized.

REFERENCES:
patent: 5508561 (1996-04-01), Tago et al.
patent: 6612024 (2003-09-01), Sasaki et al.
patent: 6940178 (2005-09-01), Kweon et al.
patent: 2002/0149118 (2002-10-01), Yamaguchi et al.

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