Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2005-11-15
2005-11-15
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S536000, C365S226000
Reexamination Certificate
active
06965263
ABSTRACT:
A biasing circuit with application to a charge pump environment for coupling the appropriate terminal voltage potentials to the bulk node. Specifically, a pass gate, such as a transistor of an integrated circuit, operates to isolate a boosted voltage input from a boosting device such as a charge pump voltage doubler and to transfer or pass the related charge to an output that is coupled to a charge store. The input and output of the pass gate are subjected to variations in voltage levels creating transient voltage potential relationships between the input (e.g., source), the output (e.g., drain), and the pass gate substrate (e.g., bulk node). Such fluctuations are accommodated through continuous monitoring of the input and output terminals and, when appropriate, coupling the corresponding potential as exhibited at one of the input or output terminals to the substrate or bulk node of the pass gate.
REFERENCES:
patent: 4847522 (1989-07-01), Fuller et al.
patent: 5451889 (1995-09-01), Heim et al.
patent: 5594381 (1997-01-01), Bingham
patent: 5602794 (1997-02-01), Javanifard et al.
patent: 5672996 (1997-09-01), Pyeon
patent: 5694072 (1997-12-01), Hsiao et al.
patent: 5767733 (1998-06-01), Grugett
patent: 5930175 (1999-07-01), Lakhani et al.
patent: 5933378 (1999-08-01), Gans et al.
patent: 5943263 (1999-08-01), Roohparvar
patent: 5946259 (1999-08-01), Manning et al.
patent: 5978268 (1999-11-01), Zink et al.
patent: 5999475 (1999-12-01), Futatsuya et al.
patent: 6023427 (2000-02-01), Lakhani et al.
patent: 6356499 (2002-03-01), Banba et al.
Khouri et al., “Very Fast Recovery World-line Voltage Regulator for Multilevel Nonovolatile Memories,” 4 pages.
Min et al., “ A High-Efficiently Back-Bias Generator with Cross-Coupled Hybrid Pumping Circuit for sub-1.5 V DRAM applications,” 4 pages, Memory Design Dept. 4, Hyundai Electronics Industries Co., Ltd.
Pelliconi et al., “Power Efficient Charge Pump in Deep Submicron Standard CMOS Technology,” 4 pages, STMicroelectronics—Central R&D.
Kim et al., “Two-Phase Boosted Voltage Generator for Low-Voltage Giga-Bit DRAMs,” Feb. 2000, pps. 266-269, IEICE Trans. Electron, vol. E83-C, No. 2.
St. Pierre, Robert, “Low-Power BiCMOS Op-Amp with Integrated Current-Mode Charge Pump,” Jul. 2000, pps. 1046-1050, IEEE Journal of Solid-State Circuits, vol. 35, No. 7.
Pylarinos et al., “A Low-Voltage CMOS Filter for Hearing Aids using Dynamic Gate Biasing,” 6 pages, 2001, CCECE/CCGEI.
Cunningham Terry D.
Micro)n Technology, Inc.
TraskBritt
LandOfFree
Bulk node biasing method and apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bulk node biasing method and apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bulk node biasing method and apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3489276