Oscillators – With frequency calibration or testing
Reexamination Certificate
2006-10-19
2008-08-12
Mis, David (Department: 2817)
Oscillators
With frequency calibration or testing
C331S158000, C331S179000, C341S126000
Reexamination Certificate
active
07411462
ABSTRACT:
A novel testing mechanism operative to test large capacitor arrays such as those used in a digitally controlled crystal oscillator (DCXO). The invention is adapted for use in DCXO circuits that employ dynamic element matching in their array decoding circuits. The invention combines the use of DEM during regular operation of the DCXO with a testing technique that greatly reduces the number of tests required. The invention tests the capacitors in the array on a row by row, wherein all the capacitors in a row are tested lumped together and treated as a single entity, which results in significantly reduced testing time. This permits the measurement of significantly higher frequency deviations due to the larger capacitances associated with an entire row of capacitors being tested.
REFERENCES:
patent: 2003/0133522 (2003-07-01), Staszewski et al.
patent: 2004/0146132 (2004-07-01), Staszewski et al.
patent: 2006/0033582 (2006-02-01), Staszewski et al.
patent: 2006/0038710 (2006-02-01), Staszewski et al.
patent: 2007/0182496 (2007-08-01), Wallberg et al.
R. B. Staszewski et al., “All-Digitial PLL and GSM/Edge Transmitter in 90nm CMOS,” IEEE International Solid-State Circuits Conference, Feb. 2005, pp. 316-217, 600.
R. B. Staszewski et al., “A Digitally Controlled Oscillator in a 90 nm Digital CMOS Process for Mobile Phones,” IEEE Journal of Solid-State Circuits, vol. 40, No. 11, Nov. 2005, pp. 2203-2211.
R. B. Staszewski et al., “All-Digital PLL and Transmitter for Mobile Phones,” IEEE Journal of Solid-State Circuits, vol. 40, No. 12, Dec. 2005, pp. 2469-2482.
C. H. Hung et al., “A Digitally Controlled Oscillator System for Saw-Less Transmitters in Cellular Handsets,” IEEE Journal of Solid-State Circuits, vol. 41, No. 5, May 2006, pp. 1160-1170.
K. Muhammad et al., “The First Fully Integrated Quad-Band GSM/GPRS Receiver in a 90-nm Digital CMOS Process,” IEEE Journal of Solid-State Circuits, vol. 41, No. 8, Aug. 2006, pp. 1772-1783.
Y. C. Ho et al. “Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time FIlters in Bluetooth and GSM Receivers,” EURASIP Journal on Wireless Communications and Networking, vol. 2006, Article 62905, pp. 1-14.
M. Nakai et al., “Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor,” IEEE Journal of Solid-State Circuits, vol. 40, No. 18, Jan. 2006, pp. 28-35.
Bodrero Vanessa M.
Staszewski Robert B.
Wallberg John
Brady III Wade James
Mis David
Neerings Ronald O.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Built-in self test method for a digitally controlled crystal... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Built-in self test method for a digitally controlled crystal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Built-in self test method for a digitally controlled crystal... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4014528