Built-in self-test circuit

Details Built-in self-test circuit Built-in self-test circuit

1991-11-08

1994-11-29

Beausoliel, Jr., Robert W.

Excavating

371 225, 371 151, 364717, G01R 3128, G06F 1100

Patent

active

053696484

ABSTRACT:
An input register for an integrated circuit, the input register including a linear feedback shift register (LFSR) connected between the IC input pads and the user logic internal to the IC. The LFSR is configured as a polynomial function generator to provide a series of pseudo random test patterns to the IC internal logic. The output of the LFSR is also provided to a compare/weights logic circuit which (1) generates a stop count signal upon the receipt of a predetermined bit pattern from the LFSR, (2) generates a plurality of weighting signals by combining selected bits from the output of the LFSR, and (3) selects the feedback signal which is provided to the LFSR to determine the characteristic polynomial and degree of the polynomial implemented by the LFSR.

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patent: 5029171 (1991-07-01), Lee et al.
patent: 5043988 (1991-08-01), Brglez et al.
patent: 5144571 (1992-09-01), Thong

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