Excavating
Patent
1996-02-07
1998-06-09
Chung, Phung M.
Excavating
39518204, 371 103, G06F 1134
Patent
active
057648786
ABSTRACT:
A built-in self-repair system includes an on-chip clock generator for triggering the repairing process to repair defective memory lines or blocks in a memory array of an ASIC chip. The on-chip clock generator enables the self-repair process to start at the power up of a computer system without a need for an external test-triggering signal. The system includes a built-in self-test circuit that tests for a defective row memory line or a defective I/O memory block. The system further includes a fault-latching-and repair-execution circuit that repairs a row memory line or an I/O memory block. Repairing an IO memory block effectively repairs faults that occur between any two adjacent column shorts within an IO memory block. The preferred repairing scheme adopts a 15N diagnosis to achieve high fault correction so that a large percentage of defective memory cells can be replaced by redundant row memory lines or redundant I/O memory blocks. The defective row memory lines and I/O memory blocks are dynamically repaired as each of the row memory lines and I/O memory blocks undergoes testing to determine if any defective memory cells exist.
REFERENCES:
patent: 5267205 (1993-11-01), Hamada
patent: 5337277 (1994-08-01), Jang
patent: 5377146 (1994-12-01), Reddy et al.
patent: 5487040 (1996-01-01), Sukegawa et al.
patent: 5577050 (1996-11-01), Bair et al.
Anderson Thomas P.
Bair Owen S.
Kablanian Adam
Le Chuong T.
Soundararajan Saravana
Chung Phung M.
LSI Logic Corporation
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