Built-in jitter measurement circuit for voltage controlled...

Details Built-in jitter measurement circuit for voltage controlled... Built-in jitter measurement circuit for voltage controlled...

2005-08-30

2005-08-30

Kinkead, Arnold (Department: 2817)

Oscillators

With frequency calibration or testing

C331S074000, C331S016000, C331S00100A, C324S076530, C327S156000, C327S159000, C327S160000, C714S704000, C714S731000, C714S733000, C714S738000, C375S376000, C375S371000

Reexamination Certificate

active

06937106

ABSTRACT:
A built-in jitter measurement circuit for a VCO (voltage-controlled oscillator) and a PLL (phase-locked loop) is disclosed. The circuit includes a divider for dividing frequency of a signal, a time to digital converter (TDC) for converting the period of the divided signal into digital values, a variance calculator for calculating variance of the period of the divided signal, a mean calculator for calculating mean value of the period of the divided signal, a encoder and counter for encoding and calculating the period of the divided signal, and a state controller as a controller for all other components. The circuit disclosed utilizes output clock of an opened-loop circuit to be measured and a divider for increasing jitter of the original signal. By measuring the bandwidth of a closed-loop circuit, accordingly, jitter of output clock of an opened-loop or an closed-loop circuit is measured by correlating the measured bandwidth and the jitter values from extrapolation.

REFERENCES:
patent: 6661266 (2003-12-01), Variyam et al.
patent: 2003/0076181 (2003-04-01), Tabatabaei et al.
patent: 2003/0098731 (2003-05-01), Tabatabaei et al.

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