Build off self-test (Bost) testing method

Details Build off self-test (Bost) testing method Build off self-test (Bost) testing method

2000-06-19

2002-12-03

Le, N. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S763010

Reexamination Certificate

active

06489791

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a build off self-test (BOST) testing method. More particularly, the invention relates to a method for performing tests at high speeds with high precision, and to a socket and a semiconductor device for use with that method.
2. Description of the Background Art
One way to facilitate device testing procedures has been known conventionally as BOST (Build Off Self Test). The BOST involves mounting on a test board an LSI or circuits for expediting examinations of a device under test (called the DUT hereunder, including an LSI or the like to be tested in bare-chip or packaged form). As such, the BOST is designed to carry out tests on high-performance multi-function DUTs by use of an unsophisticated low-performance tester.
In a typical testing setup, a high-frequency oscillator is mounted on the test board so that a clock signal generated thereby is used to perform tests on a DUT at frequencies higher than the tester frequency. In another setup, an operation amplifier is mounted on the test board so as to test analog signals.
FIG. 14
is a schematic view of a setup in which to practice a conventional BOST method. Referring to
FIG. 14
, an LSI
1008
for use with the BOST (LSI or the like under test in bare-chip or packaged form, called the BOST LSI hereunder) receives a simple control signal from a tester
1001
. In turn, the BOST LSI
1008
generates test signals necessary for testing a DUT
1007
, checks to see if output signals from the DUT
1007
are correct, and notifies the tester
1001
of the results of the tests on the DUT
1007
.
The BOST LSI
1008
and DUT
1007
are mounted on different sockets
1012
attached to a test board
1003
and exchange relevant signals through printed wiring
1010
. The BOST LSI
1008
and DUT
1007
use paths indicated by broken lines in the printed wiring
1010
in order to receive from the tester
1001
the power necessary for their operations. The tester
1001
thus causes the BOST LSI
1008
to operate.
Furthermore, the DUT
1007
uses the printed wiring
1010
indicated by solid lines to exchanges signals with the BOST LSI
1008
for testing.
Part of the signals input and output to and from the DUT
1007
may be exchanged directly with the tester
1001
. This arrangement is intended to alleviate loads on the BOST LSI
1008
.
In the conventional BOST setup outlined above, the BOST LSI
1008
and DUT
1007
are mounted on different sockets
1012
and exchange signals therebetween via the printed wiring
1010
. This has led to problems such as a mismatch of impedance due to contactors
1006
of the different sockets
1012
, or signal delays over the printed wiring
1010
.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously mentioned problems, and general a object of the present invention are to provide a novel and useful testing method, a socket for use with the method, and a semiconductor device for use with the method.
The above object of the present invention is achieved by a testing method for use with a BOST setup. In the method, there are mounted on a single socket a BOST semiconductor device and a semiconductor device under test. The semiconductor device under test is tested using the BOST semiconductor device.
The above object of the present invention is also achieved by a socket for use in a BOST setup. The socket includes a socket body with a space to accommodate a first semiconductor device. A first cap with a space to accommodate a second semiconductor device is provided so as to push electrodes of the first semiconductor against contactors. A second cap pushing electrodes of the second semiconductor device against the electrodes of the first semiconductor device is also provided.
The above object of the present invention is further achieved by a semiconductor device for use in a BOST setup described below. The semiconductor device includes a BGA structure having conductive elastic elements attached to electrodes instead of solder balls.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.


REFERENCES:
patent: 6065134 (2000-05-01), Bair et al.
patent: 6194907 (2001-02-01), Kanao et al.
patent: 8-304459 (1996-11-01), None

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