Buffered crossbar switch and its method of operation

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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C370S412000, C370S429000

Reexamination Certificate

active

10334218

ABSTRACT:
The present invention relates to a buffered crossbar switch and its method of operation which provides a step of changing the size and/or number of queuing buffer entries to ensure optimum buffer memory usage independent of the size of data packets processed.

REFERENCES:
patent: 6449283 (2002-09-01), Chao et al.
patent: 6909710 (2005-06-01), Goldrian et al.
patent: 6915372 (2005-07-01), Magill et al.
patent: 7154885 (2006-12-01), Nong
patent: 2003/0063618 (2003-04-01), Khacherian et al.
Javidi et al., A high-throughput scheduling algorithm for a buffered crossbar switch fabric, Communications, 2001 . ICC 2001. IEEE International Conference on vol. 5, Jun. 11-14, 2001, pp. 1586-1591.
Yoshigoe et al., A parallel-polled virtual output queued switch with a buffered crossbar, High Performance Switching and Routing, 2001 IEEE Workshop on May 29-31, 2001, pp. 271-275.

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