Static information storage and retrieval – Hardware for storage elements
Reexamination Certificate
2004-09-30
2009-06-02
Phan, Trong (Department: 2827)
Static information storage and retrieval
Hardware for storage elements
C365S194000, C365S233100, C365S233110, C365S233120, C365S233130
Reexamination Certificate
active
07542322
ABSTRACT:
A method, system and apparatus to distribute a clock signal among a plurality of memory units in a memory architecture. A buffer chip is coupled to a plurality of memory units each by a point to point link. The buffer chip includes a clock generator to generate a continuous free running clock that may be passed serially through a subset of memory units in the architecture. Sending of data is delayed over the point to point links based on proximity of the memory units to the buffer chip to accommodate delay in the multidrop clock signal.
REFERENCES:
patent: 5390147 (1995-02-01), Smarandoiu et al.
patent: 5495435 (1996-02-01), Sugahara
patent: 5712811 (1998-01-01), Kim
patent: 5786732 (1998-07-01), Nielson
patent: 5867448 (1999-02-01), Mann
patent: 5872959 (1999-02-01), Nguyen et al.
patent: 5917760 (1999-06-01), Millar
patent: 6034878 (2000-03-01), Osaka et al.
patent: 6115318 (2000-09-01), Keeth
patent: 6262940 (2001-07-01), Choi et al.
patent: 6434081 (2002-08-01), Johnson et al.
patent: 6438015 (2002-08-01), Kyung
patent: 6477614 (2002-11-01), Leddige et al.
patent: 6654270 (2003-11-01), Osaka et al.
patent: 6687780 (2004-02-01), Garlepp et al.
patent: 6717832 (2004-04-01), Johnson et al.
patent: 6724666 (2004-04-01), Janzen et al.
patent: 6724685 (2004-04-01), Braun et al.
patent: 6744124 (2004-06-01), Chang et al.
patent: 6747891 (2004-06-01), Hoffmann et al.
patent: 6845436 (2005-01-01), Wu
patent: 6845460 (2005-01-01), Lee et al.
patent: 6937494 (2005-08-01), Funaba et al.
patent: 6972981 (2005-12-01), Ruckerbauer et al.
patent: 6980042 (2005-12-01), LaBerge
patent: 6996749 (2006-02-01), Bains et al.
patent: 7111108 (2006-09-01), Grundy et al.
patent: 7154809 (2006-12-01), Gregorius et al.
patent: 2004/0105292 (2004-06-01), Matsui
patent: WO/2005101164 (2005-10-01), None
U.S. Appl. No. 11/516,824, Mailed Sep. 19, 2008, 12 pages.
McCall James A.
Walker Clinton F.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Phan Trong
LandOfFree
Buffered continuous multi-drop clock ring does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Buffered continuous multi-drop clock ring, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buffered continuous multi-drop clock ring will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4145640