Buffered bootstrapped input switch with cancelled charge...

Details Buffered bootstrapped input switch with cancelled charge... Buffered bootstrapped input switch with cancelled charge...

2002-10-12

2004-04-20

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

C327S589000

Reexamination Certificate

active

06724236

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to transistor switches, and more particularly to a buffered bootstrapped input switch that employs cancelled charge sharing for use in high performance sample and hold switched capacitor circuits especially usefull for implementing an analog-to-digital converter (ADC) or amplifier circuit front end sampling network.
2. Description of the Prior Art
The core dynamic performance of a switched capacitor ADC or amplifier circuit is determined by the front-end sampling network (Sample and Hold) such as that illustrated in FIG.
1
. This network
100
comprises a pair of bootstrapped NMOS switches
102
,
104
sampling the analog inputs applied to associated capacitors
106
,
108
at the same rate as the clock
106
.
The quality of the sampling switches
102
,
104
can affect the linearity of the sampled value. For this reason, bootstrapping techniques such as that shown in
FIG. 2
are used to maintain a constant voltage between the gate and the source of the switches
102
,
104
.
The bootstrap circuit
200
is problematic in two ways. First, there is substantial loading on the input by the bootstrapping capacitor
202
. Buffering the input has been found to solve this problem. Second, there is charge sharing between the bootstrapping capacitor
202
and the gate capacitance of the input switches
102
,
104
. This charge sharing effect occurs when the charged bootstrapping capacitor
202
connects in series to the gate of either sampling switch
102
,
104
(Charge is lost to charge the gate), resulting in a reduced bootstrapped voltage. Very large bootstrapping capacitors (greater than 10-20 pF) have classically been employed to alleviate this second problem, which undesirably limits the speed of the charging circuit, and increases power dissipation.
It is therefore both advantageous and desirable in view of the foregoing, to provide a buffered bootstrapped input switch that employs cancelled charge sharing for use in high performance sample and hold switched capacitor circuits especially useful for implementing, for example, an analog-to-digital converter (ADC) or amplifier circuit front end sampling network, among others.
SUMMARY OF THE INVENTION
The present invention is directed to a buffered bootstrapped input switch that employs cancelled charge sharing for use in high performance sample and hold switched capacitor circuits especially useful for implementing, for example, an analog-to-digital converter (ADC) or amplifier circuit front end sampling network, among others. A scheme is employed for estimating the charge loss from the bootstrapping capacitor to the gate of the bootstrapped input switch, storing the estimated charge loss on a small capacitor, buffering the small capacitor, and then adding the estimated charge loss in series to the bootstrap capacitor, to provide an almost ideal bootstrap network.
According to one embodiment, a switching network comprises at least one MOS switch having a gate and a source; a bootstrapping capacitor configured to maintain a substantially constant voltage between the gate and the source of the at least one MOS switch; and a dummy input network configured to eliminate charge sharing between the bootstrapping capacitor and the gate capacitance of the at least one bootstrapped MOS switch.
According to another embodiment, a switching network comprises at least one bootstrapped input switch; and a dummy input network configured to cancel charge sharing associated with the at least one bootstrapped input switch.
According to yet another embodiment, a method of canceling charge sharing comprises the steps of providing a switching network comprising at least one bootstrapped input switch and a dummy input network configured to constantly measure charge loss associated with the at least one bootstrapped input switch; and canceling charge sharing between the at least one bootstrapped input switch and a bootstrapping capacitor in response to the measured charge loss.


REFERENCES:
patent: 5170075 (1992-12-01), De Wit
patent: 5828262 (1998-10-01), Rees
patent: 6323697 (2001-11-01), Pavan
patent: 6489758 (2002-12-01), Moriconi et al.
Dan Kelly, Will Yang, Luri Mehr, Mark Sayuk, Larry Singer, 2001 IEEE International Solid-State circuits Conference, “A 3V 340mW 14b 75MSPS CMOS ADC with 85dB SFDR at Nyquist”, pp 134-135, Feb. 6, 2001.

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