Buffer/voltage-mirror arrangements for sensitive node...

Details Buffer/voltage-mirror arrangements for sensitive node... Buffer/voltage-mirror arrangements for sensitive node...

2007-10-02

2007-10-02

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S112000, C326S083000

Reexamination Certificate

active

10984584

ABSTRACT:
The present invention is directed to buffer/voltage mirror arrangement for sensitive node voltage connections.

REFERENCES:
patent: 3946327 (1976-03-01), Hsu
patent: 3991380 (1976-11-01), Pryor
patent: 4284958 (1981-08-01), Pryor et al.
patent: 4284959 (1981-08-01), Heagerty et al.
patent: 4333057 (1982-06-01), Hoover
patent: 5070259 (1991-12-01), Rempfer et al.
patent: 5126685 (1992-06-01), Platt et al.
patent: 5220216 (1993-06-01), Woo
patent: 6025752 (2000-02-01), Zhou et al.
patent: 6847236 (2005-01-01), Song
Hodges et al., Analysis And Design of Digital Integrated Circuits, McGraw-Hill Inc., second edition, section 10.5.4, pp. 408-411.

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