Buffer/voltage-mirror arrangements for sensitive node...

Details Buffer/voltage-mirror arrangements for sensitive node... Buffer/voltage-mirror arrangements for sensitive node...

2005-01-25

2005-01-25

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S112000, C326S083000

Reexamination Certificate

active

06847236

ABSTRACT:
The present invention is directed to buffer/voltage-mirror arrangements for sensitive node voltage connections.

REFERENCES:
patent: 3946327 (1976-03-01), Hsu
patent: 3991380 (1976-11-01), Pryor
patent: 4284958 (1981-08-01), Pryor et al.
patent: 4284959 (1981-08-01), Heagerty et al.
patent: 4333057 (1982-06-01), Hoover
patent: 5070259 (1991-12-01), Rempfer et al.
patent: 5126685 (1992-06-01), Platt et al.
patent: 5220216 (1993-06-01), Woo
patent: 6025752 (2000-02-01), Zhou et al.

Affiliated with

Also associated with

Rating

Buffer/voltage-mirror arrangements for sensitive node... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buffer/voltage-mirror arrangements for sensitive node..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buffer/voltage-mirror arrangements for sensitive node... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3384027