Boots – shoes – and leggings
Patent
1984-12-05
1988-06-14
Williams, Jr., Archie E.
Boots, shoes, and leggings
G06F 1206
Patent
active
047516380
ABSTRACT:
A buffer storage control system is incorporated in a multiprocessor and includes therein operand side buffer storages and instruction fetch side buffer storages. Under control of the system, a store operation is achieved with the use of an identification flag, which indicates that the related address invalidation is to be effected at the operand side or the instruction fetch side, while a fetch operation is achieved with the use of the identification flag which indicates that the related store address is to be recorded in the operand side buffer memory (TAG) or the instruction fetch side buffer memory (TAG).
REFERENCES:
patent: 3982231 (1976-09-01), Bernstein
patent: 4214304 (1980-07-01), Shimizu
patent: 4290103 (1981-09-01), Hattori
patent: 4493026 (1985-01-01), Olnowich
patent: 4550367 (1985-10-01), Hattori
Chan Emily Y.
Fujitsu Limited
Williams Jr. Archie E.
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