Patent
1995-01-18
1998-01-27
Lall, Parshotam S.
395872, 395856, G06F 1314
Patent
active
057129916
ABSTRACT:
A peripheral controller device (14) controlling at least a first peripheral device (16) attached thereto, the controller device including a programmable and selectable buffer memory for utilization with a first type and a second type of write instruction for writing data to first type (24) and a second type (26), respectively, of memory in the peripheral device (16). The peripheral controller device includes an n deep buffer memory (36), where n is an integer greater than one, for buffering the write instructions. A user may programmably indicate whether only the first type of write instruction is to be buffered or both types of instructions are to be buffered. Responsive to such programming, write instructions are examined to determine if they are of the first type or the second type. Depending on the programming, write instructions of the second type are routed to the buffer or are routed by bypassing the buffer memory.
REFERENCES:
patent: 5189665 (1993-02-01), Niehaus
patent: 5263142 (1993-11-01), Watkins et al.
patent: 5267191 (1993-11-01), Simpson
patent: 5317210 (1994-05-01), Patel
patent: 5418927 (1995-05-01), Chang et al.
patent: 5423016 (1995-06-01), Tsuchiya et al.
Cornish John
Qureshi Qadeer A.
Wichman Shannon A.
Donaldson Richard L.
Kesterson James C.
Lall Parshotam S.
Moore J. Dennis
Texas Instrument Incorporated
LandOfFree
Buffer memory for I/O writes programmable selective does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Buffer memory for I/O writes programmable selective, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buffer memory for I/O writes programmable selective will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-349554