Buffer memory device capable of memorizing operand and instructi

Details Buffer memory device capable of memorizing operand and instructi Buffer memory device capable of memorizing operand and instructi

1989-05-17

1992-04-28

Bowler, Alyssa H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

36523003, 36518905, G06F 300, G06F 1300, G11C 800

Patent

active

051094983

ABSTRACT:
In a buffer memory device intermediate between a data processing unit and a main memory to memorize and read out an operand data block and an instruction data block in response to an operand request and an instruction request, respectively, the operand and the instruction data blocks have an operand block size and an instruction block size equal to N times the operand block size, respectively, where N is an integer greater than unity. The number N is preferably equal to 2.sup.n, where n is a natural number. The buffer memory device comprises a data buffer having a plurality of cache areas each of which has a predetermined area size equal to the operand block size. Thus, the operand data block occupies a single one of the cache areas while the instruction data block occupies a plurality of the cache areas, N in number. The operand data blocks coexist with the instruction data blocks in the data buffer at different block sizes. A data processor in the buffer memory device is selectively supplied with the operand and the instruction requests to produce an area address signal for accessing a single one and a plurality of the cache areas, respectively. The area address signal is sent to the buffer memory and a monitoring circuit for monitoring the buffer memory.

REFERENCES:
patent: 4312036 (1982-01-01), Porter et al.
patent: 4575814 (1986-03-01), Brooks, Jr. et al.
patent: 4908748 (1990-03-01), Pathak et al.

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