Coating processes – Electrical product produced – Metallic compound coating
Patent
1999-09-21
2000-12-05
Turner, Archene
Coating processes
Electrical product produced
Metallic compound coating
4271261, 4274191, 4274192, 4274193, B05D 700
Patent
active
061563765
ABSTRACT:
Buffer layer architectures are epitaxially deposited on biaxially-textured rolled substrates of nickel and/or copper and their alloys for high current conductors, and more particularly buffer layer architectures such as Y.sub.2 O.sub.3 /Ni, YSZ/Y.sub.2 O.sub.3 /Ni, RE.sub.2 O.sub.3 /Ni, (RE=Rare Earth), RE.sub.2 O.sub.3 /Y.sub.2 O.sub.3 /Ni, RE.sub.2 O.sub.3 /CeO.sub.2 /Ni, and RE.sub.2 O.sub.3 /YSZ/CeO.sub.2 /Ni, Y.sub.2 O.sub.3 /Cu, YSZ/Y.sub.2 O.sub.3 /Cu, RE.sub.2 O.sub.3 /Cu, RE.sub.2 O.sub.3 /Y.sub.2 O.sub.3 /Cu, RE.sub.2 O.sub.3 /CeO.sub.2 /Cu, and RE.sub.2 O.sub.3 /YSZ/CeO.sub.2 /Cu. Deposition methods include physical vapor deposition techniques which include electron-beam evaporation, rf magnetron sputtering, pulsed laser deposition, thermal evaporation, and solution precursor approaches, which include chemical vapor deposition, combustion CVD, metal-organic decomposition, sol-gel processing, and plasma spray.
REFERENCES:
patent: 5741377 (1998-04-01), Goyal et al.
Wu et al, Appl. Phys. Lett., 65 (15) Oct. 10,1994, p. 1961.
Paranthaman et al, Physica, C 275, 1997, pp. 266-272, (no month).
Goyal Amit
Kroeger Donald M.
Lee Dominic F.
Paranthaman Mariappan
Turner Archene
UT-Battelle LLC
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