Buffer for use with a fixed disk controller

Details Buffer for use with a fixed disk controller Buffer for use with a fixed disk controller

1981-12-23

1984-06-12

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 300

Patent

active

044545959

ABSTRACT:
A buffer for use with a word processing fixed disk controller. The buffer is connected to a microprocessor and communications bus used for interfacing a floppy disk processor to a hard or fixed disk controlled. Also connected to the communications bus are a direct memory access (DMA) controller and random access memory. The buffer operates on a first-in/first-out (FIFO), or rotating shift register basis, although it is a stationary four-part buffer. Error checking and correcting can be performed on a disk processor level. A block of data is transferred to the disk via a DMA operation only when the block of data is complete, thus eliminating data early and data late conditions.

REFERENCES:
patent: 4144583 (1979-03-01), Lawson et al.
patent: 4210959 (1980-07-01), Wozniak
patent: 4371929 (1983-02-01), Brann et al.

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