Buffer for identification of pin contentions in circuit design a

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364578, G06F 1750

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active

059093757

ABSTRACT:
A system and method for making and using integrated circuits using a modeling system. The system utilizes a pin test buffer. The pin test buffer inputs external inputs to a pin, and outputs to the same pin from the device. If contention is noted between the system inputs to the pin, and outputs from the device to the pin, contention error notices are provided to the user.

REFERENCES:
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patent: 4697241 (1987-09-01), Lavi
patent: 5260611 (1993-11-01), Cliff et al.
patent: 5329630 (1994-07-01), Baldwin
patent: 5623418 (1997-04-01), Rostoker et al.
patent: 5633813 (1997-05-01), Srinivasan
"Development Tools," Altera Databook, Mar. 1995, Chapter 13, pp. 509-565.

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