Boots – shoes – and leggings
Patent
1980-05-06
1983-03-29
Chan, Eddie P.
Boots, shoes, and leggings
G06F 1300, G11C 900
Patent
active
043785883
ABSTRACT:
A datapath system and protocol is disclosed in which data is transferred between a computer memory and one or more peripheral devices through device controllers, each of which includes a buffer, through periodic connection of the device controller to the channel. The system and protocol are structured to permit multiple device controllers to cooperatively interact on a single channel, without direct communication between device controllers. Each device controller monitors the level of stress on its buffer and at appropriate times presents a reconnect request to the channel, together with indica for permitting the channel to determine the priority of a particular request relative to other reconnect requests. The times at which a reconnect signal should be presented are determined by monitoring the level of information storage in the buffer and relating that level to a threshold level; both overfilling and overemptying are prevented. The threshold level can be varied in accordance with a criteria which makes allowance for the number and combination of device controllers attached to the channel; and is set such that the remaining space in the buffer is sufficient to allow the buffer to transfer data to or from the associated peripheral device, at the rate demanded by that peripheral device, long enough to allow the channel to connect to one lower priority device controller, and all higher priority device controllers. The threshold level and buffer size are also set such that, after a reconnect, the buffer is capable of transferring data to or from the associated peripheral device, at the rate demanded by the peripheral, long enough for the channel to reconnect to all lower priority device controllers, to ensure that all device controllers, no matter the priority, are allowed access to the channel. The invention has broad application, but is particularly well-suited to fault tolerant computing systems.
REFERENCES:
patent: 3059221 (1962-10-01), Page et al.
patent: 3292156 (1966-12-01), Stochel
patent: 3836891 (1974-09-01), McDaniel
patent: 4040026 (1977-08-01), Gernelle
patent: 4040027 (1977-08-01), Van Es et al.
Bartlett Joel F.
Bixler Richard M.
Davidow William H.
Despotakis John A.
Graziano Peter J.
Chan Eddie P.
Feix Donald C.
Tandem Computers Incorporated
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