Buffer control apparatus and method

Details Buffer control apparatus and method Buffer control apparatus and method

1998-02-13

2002-10-29

Hsu, Alpus H. (Department: 2665)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S419000

Reexamination Certificate

active

06473432

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
This invention relates to a buffer control apparatus and method and, in particular, to a buffer control apparatus and method favorably applicable to a buffering portion of fixed-length data (ATM cell) treated in an ATM (Asynchronous Transfer Mode) communication system.
(2) Description of the Related Art
ATM communication systems can perform communications while setting different bands according kinds (applications) of the communications such as data communications, telephone communications, and the like. For example, it is necessary to set a band on the order of several Mbps to several ten Mbps for transmitting dynamic image information in data communications and a band on the order of 64 kbps for transmitting sound information in telephone communications. In ATM communication systems, statistical multiplexing at ATM cell level is performed in ATM communication apparatus such as ATM switch and cell concentrator in ATM communication networks, whereby the communications in these various bands are accommodated with a high efficiency, thus allowing the bands to be effectively utilized.
Meanwhile, as is well known, the above-mentioned ATM switch and cell concentrator perform control for distributing input cells into desired transfer destinations according to the cell transfer destination information stored at the header portion of each ATM cell. Here, performed in order to prevent the cells having the same transfer destination information from colliding with each other upon being distributed is cell conflict control in which a buffer is used for temporarily accumulating the input cells so as to output the cells as slightly shifting from each other.
For example, as shown in
FIG. 36
, in an ATM switch
100
, ATM cells from a plurality of subscribers' terminals accommodated in the switch
100
are multiplexed in a multiplexing section
101
and then are temporarily accumulated in a common buffer (FIFO: First In First Out)
102
so as to adjust the output timing of each cell, before being distributed by a demultiplexing section
103
.
In the ATM switch
100
of this type using the common buffer
102
, however, when a certain subscriber's terminal transmits a large amount of data (ATM cells), a major part of the storage capacity of the common buffer
102
may be occupied by the data from this subscriber's terminal, thereby extremely reducing the band that can be utilized by the other subscribers' terminals.
In order to overcome this problem, bands may be secured for respective terminals or respective kinds of communications. Nevertheless, in data communications with a strong burst characteristic, idle bands not in use increase so that the secured bands may not effectively be utilized. Therefore proposed is a discrete buffer system which basically does not secure bands for respective communications but only guarantees bands which are supposed to be minimally required.
FIG. 37
is a block diagram for explaining this discrete buffer system. As shown in this diagram, an ATM switch
100
′ comprises not only the multiplexing section
101
and demultiplexing section
103
similar to those shown in
FIG. 36
, but also discrete buffers
104
provided for respective input routes [e.g., VPs (Virtual Paths)/VCs (Virtual Channels) of the ATM cells] and, as a buffer control apparatus for controlling the writing/reading processing of ATM cells with respect to the discrete buffers
104
, a route (channel) discriminating section
105
and a readout control section
106
.
Here, the channel discriminating section
105
identifies, from the header portion of the arriving cell, the route (VP/VC) of this cell so as to distribute it to its appropriate discrete buffer
104
. The readout control section
106
polls each discrete buffer
104
at a predetermined period, thereby sequentially reading out the cells stored in the respective discrete buffers
104
.
As a result of the foregoing configuration, in the ATM switch
100
′ (buffer control apparatus), the arriving cells are successively stored in the discrete buffers
104
for the respective input routes, and then the readout control section
106
reads out the cells one by one from all the discrete buffers
104
. Consequently, for example, assuming that the number of input routes is X (the total number of the discrete buffers
104
is X; where X is a natural number not smaller than 2), and the output channel band is V, the readout control section
106
would poll each discrete buffer
104
once in X times, thereby securing a band of at least V/X.
In order to attain a performance (maximum permissible band) on the same order as that of the common buffer system in such buffer control apparatus (discrete buffer system), it is necessary to greatly increase the storage capacity of each discrete buffer
104
or speed up the readout control performed by the readout control section
106
. In either case, however, the size of the apparatus increases, or the control becomes complicated.
SUMMARY OF THE INVENTION
In view of such problems, it is an object of the present invention to provide a buffer control apparatus and buffer control method in which storage control of a common buffer is performed such that the common buffer can be virtually used as discrete buffers, thus allowing a minimum band to be secured without increasing the buffer capacity or complicating the readout control with respect to the buffer.
Therefore, the present invention provides a buffer control apparatus for controlling storage process for a common buffer which is commonly used for a plurality of routes and temporarily stores data received from the routes, the buffer control apparatus comprising a route discriminating section for identifying the routes of the received data, a storage section for storing at least information concerning a storing position for the received data within the common buffer for each of the routes, and a control section for performing a control operation for virtually storing, route by route, the received data into the common buffer according to a result of route identification in the route discriminating section and the information concerning the storing position in the storage section.
Also, the present invention provides a buffer control method for controlling storage in a common buffer which is commonly used for a plurality of routes and temporarily stores data received from the routes, the method comprising the step of virtually storing, route by route, the received data into the common buffer.
Accordingly, in the buffer control apparatus and method of the present invention, since the common buffer can be virtually used as discrete buffers respectively provided for individual routes, a predetermined buffering can be easily realized for all the routes, whereby a minimally required band can be certainly secured for each route without increasing the buffer capacity.


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Methodologies For Bandwidth Allocation, Transmission Schedu

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