Buffer circuitry for transferring signals from TTL circuitry to

Details Buffer circuitry for transferring signals from TTL circuitry to Buffer circuitry for transferring signals from TTL circuitry to

1991-12-23

1994-03-29

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307456, H03K 19092, H03K 19088

Patent

active

052988074

ABSTRACT:
A buffer circuit including a first N channel field effect transistor including a source terminal connected to ground, a gate terminal connected to a source of input signals, and a drain terminal; a W channel field effect transistor having a source terminal connected to the drain terminal of the N channel field effect transistor, a drain terminal connect to a source of varying voltage, and a gate terminal connected to its drain terminal; and an inverter having an input terminal connected to the drain terminal of the N channel transistor, and an output terminal.

REFERENCES:
patent: 3980896 (1976-09-01), Kato
patent: 4504746 (1985-03-01), Segawa et al.
patent: 4568844 (1986-02-01), O'Connor
patent: 4571504 (1986-02-01), Iwamoto et al.
patent: 4574273 (1986-03-01), Atsumi et al.
patent: 4584491 (1986-04-01), Ulmer
patent: 5144167 (1992-09-01), McClintock

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