Buffer circuitry

Details Buffer circuitry Buffer circuitry

1979-12-10

1982-01-05

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307450, 307578, 307581, H03K 17693, H03K 1704, H03K 17094

Patent

active

043096301

ABSTRACT:
Buffer circuitry, which uses enhancement and depletion mode field effect transistors, has relatively high speed operation, low power dissipation, and requires a relatively modest amount of silicon area for implementation.

REFERENCES:
patent: 3721963 (1973-03-01), Jenne
patent: 3937983 (1976-02-01), Reed
patent: 4071783 (1978-01-01), Knepper
patent: 4096398 (1978-06-01), Khaitan
patent: 4103189 (1978-07-01), Perlegos et al.
patent: 4161040 (1979-07-01), Satoh
patent: 4219743 (1980-08-01), Millns
Bula et al., "High Speed, High Level Signal Driver", IBM Tech. Discl. Bull., vol. 20, No. 4, p. 1517, 9/1977.
Lewis et al., "Two-Stage, Single-Phase Driver Circuit", IBM Tech. Discl. Bull., vol. 17, No. 10, p. 2837, 3/1975.

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