Buffer circuit with enhanced overvoltage protection

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific voltage responsive fault sensor

Reexamination Certificate

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C326S081000

Reexamination Certificate

active

07430100

ABSTRACT:
A buffer circuit having enhanced overvoltage protection includes core buffer circuitry couplable to a first voltage source having a first voltage level. The core buffer circuitry is configured to receive a first signal and to generate a second signal which is a function of the first signal. The buffer circuit further includes a protection circuit coupled between the core buffer circuitry and a signal pad. The protection circuit is operative: (i) to clamp the first signal to about the first voltage level when a third signal received at the signal pad exceeds the first voltage level by a first amount; and (ii) to generate the first signal being substantially equal to the third signal when the third signal is less than or substantially equal to the first voltage level.

REFERENCES:
patent: 5416368 (1995-05-01), Sugibayashi
patent: 5629542 (1997-05-01), Sakamoto et al.
patent: 5880605 (1999-03-01), McManus
patent: 6031393 (2000-02-01), Wayner
patent: 6064231 (2000-05-01), Kothandaraman et al.
patent: 7098694 (2006-08-01), Bhattacharya et al.
patent: 05343977 (1993-12-01), None
Uezono, Yukinori, Level Conversion Circuit, Dec. 24, 1993, Fujitsu LSD, Abstract, p. 1.

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