Buffer circuit suitable for low voltage operation

Details Buffer circuit suitable for low voltage operation Buffer circuit suitable for low voltage operation

1985-10-07

1986-12-30

Wong, Peter S.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

330288, G05F 316

Patent

active

046331662

ABSTRACT:
An integrated circuit unity gain buffer amplifier suitable for low voltage operation, in which the input signal is applied to the base of a common emitter NPN transistor first stage. The collector of the first stage is connected to the base of an emitter follower NPN transistor second stage. The emitter of the second stage is connected to the base of an emitter follower PNP transistor third stage. The collector of the first stage is loaded by a constant current source and its emitter is connected through a resistance to ground. The collector and emitter of the second and third stages respectively are connected together through a resistor to the supply voltage. The emitter of the second stage is connected through a resistance to ground. The collector of the third stage is connected both to the output terminal and to the emitter of the first stage. This allows the circuit to operate at a very low supply voltage without any transistor operating in practical saturation.

REFERENCES:
patent: 4004244 (1977-01-01), Schode, Jr.
patent: 4507573 (1985-03-01), Nagano

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