Buffer circuit

Details Buffer circuit Buffer circuit

2002-12-02

2004-10-05

Tso, Edward H. (Department: 2838)

Electricity: battery or capacitor charging or discharging

Capacitor charging or discharging

Reexamination Certificate

active

06801018

ABSTRACT:

The invention concerns a buffer circuit for a load to be supplied by a supply DC voltage, with a buffer capacitor, which can be charged to a voltage by a charging circuit, which voltage is higher than the supply DC voltage and which can be brought in at the time of dips in the supply voltage for supply of the load by a discharging circuit.
Buffer circuits are used to buffer a supply DC voltage, in order to be able to continue to operate devices temporarily in the event of voltage dips, e.g., in power grid voltage. This is, for example, important with electronic devices to avoid data losses without having to resort to the very expensive solution of uninterruptible power supplies that are fed by accumulators.
A problem which occurs with all buffer circuits of the art in question is the low energy that can be stored in a capacitor compared to accumulators, whereby this energy increases in direct proportion with capacitance but quadratically relative to the charging voltage. To save cost and volume, an increase of the buffer energy by increasing the capacitor voltage is naturally advisable.
It is known to provide buffer capacitors on the DC voltage input side of switching power supplies and to switch them in in the event of power grid failure. This solution is practical to use only with power supplies that are designed for a broad range of input voltages. The solution is, moreover, cost intensive and, for safety reasons, can hardly be located in an additional device separate from the actual power supply.
It is further known to charge a buffer capacitor on the load side of a power supply to the maximum tolerable voltage to obtain the highest possible buffer energy. If an AC voltage is available on the output portion of a power supply, one or a plurality of voltage doublers with diodes and capacitors may be used for the charging circuit. However, limits are usually set here since most consuming devices can operate properly only in a narrow voltage range.
Increasing the capacity of the buffer capacitor, whether in a DC voltage intermediate loop of a power supply unit or on the output side, i.e., the load side of a power supply unit, naturally always results in a corresponding increase of the stored energy; however, it also results in a substantially proportional increase in structural volume and costs.
The charging of buffer capacitors takes place in many cases via a resistor—which, however, is associated with high losses—or via a current source circuit. If a limitation of the voltage on the buffer capacitor is necessary or desired, this can be handled, for instance, by a Zener diode connected in parallel.
Known discharging circuits consist of a switch controlled by a trigger circuit and a limiting resistor, whereby the voltage must be limited possibly by a parallel regulator, a Zener diode, or by reopening the switch. In this process, in any case, half the stored buffer energy is lost as Joule heat.
DD 223,302 A1 presents a buffer circuit of the art in question, wherein an additional winding with a rectifier connected downstream is used on the transformer of a switching power supply to charge the buffer capacitor. The load is fed from a secondary winding with a rectifier connected downstream, and the actual supply voltage is coupled to the primary winding of the transformer via a controlled switch. In the event of power grid failure, there is feedback from the buffer capacitor to the primary side. After the fact installation of the buffer circuit disclosed here into an existing network device is not possible because of the design used.
JP 10 062456 A discloses a voltage monitoring circuit that delivers a reset signal to a CPU when the supply voltage of the CPU drops below a predefinable minimum.
DE 38 05 256 A1 discloses a circuit for the emergency power supply of a consuming device in a motor vehicle, whereby a storage capacitor is charged via a step-up controller. In normal operation, a selected consuming device is supplied via a regulator from the battery voltage; whereas, in the event of failure of the battery voltage, the capacitor is connected via an additional longitudinal regulator to the input of the aforementioned regulator and the selected consuming device is supplied.
A similar circuit is presented in DE 195 42 085 A1. Here again, a selected consuming device that represents only a fraction of the possible total load of the auto battery is temporarily supplied in the event of a failure. The supply again occurs from a capacitor which is charged by a step-up controller, whereby the voltage is fed to the selected consuming device via a stabilizer.
In both EP 0 798 840 A2 and in U.S. Pat. No. 5,714,863, circuits are described that are to avoid the problem of voltage dips of an accumulator of a mobile power supply during bursts of transmission. In each case, both a step-up controller that charges a capacitor and a step-down controller that supplies the mobile radio or at least its final stage are provided. The step-up controller and the step-down controller are always in operation and the presence of the battery voltage is likewise a requirement. In this case, emergency operation is neither possible nor considered.
One object of the invention is to provide a buffer circuit that achieves, on the one hand, high stored energy with relatively low cost and small structural volume, and can, on the other, be connected directly to the load to be buffered, i.e., merely with a two wire connection.
One object of the invention is to provide a buffer circuit that achieves high stored energy with relatively low cost and small structural volume. [sic]
This object is achieved with a buffer circuit of the type mentioned in the introduction that is characterized according to the invention by a step-down controller, whose input is coupled to the buffer capacitor and whose output is coupled to the load, and a trigger circuit, which is configured to activate the step-down controller in the event of dropout of the voltage at the load.
The buffer circuit according to the invention offers not only the advantages of low cost and minimal structural volume with maximum stored energy, but it also can be located in an external device that can be used as an add-on to an already existing power supply.
If the charging circuit is a step-up controller whose input is coupled to the load and whose output is coupled to the buffer capacitor, it is possible, on the one hand, to avoid the losses inherent to a charging resistor and, on the other, not to have to rely on the level of the supply voltage or an auxiliary voltage, generated, for instance, by voltage doubling.
In a solution expedient due to its cost advantage, the trigger circuit is configured to deliver switching pulses to the step-down controller.
To avoid circuit technology problems, it is advantageous, particularly with a relatively high supply DC voltage or a relatively high voltage on the buffer capacitor, to provide a potential segregation means for the trigger circuit. In this case, provision can advantageously be made for the potential segregation means to be a transformer via which the output of the trigger circuit is connected to the step-down controller.
Provision is made in a practical and simple embodiment of the invention for the step-up controller to have a first controlled switch, via which a first inductance can be periodically connected to the load voltage, plus a first capacitor coupled in parallel to the load, as well as a first diode leading to the buffer capacitor from the connection of the first inductance with the first switch.
For the same reasons, an embodiment maybe advisable in which the step-down controller has a second controlled switch via which the voltage on the buffer capacitor can be periodically connected to the load in series with a second inductance, to which load a second capacitor is coupled in parallel, and the series connection of the second inductance with the second capacitor is jumpered by a backflow diode.


REFERENCES:
patent: 4197582 (1980-04-01), Johnston et al.
patent: 5714863 (1998-02-01), Hwang

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