Buffer amplifier, driver IC and display apparatus using that...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reexamination Certificate

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C345S042000, C345S051000, C345S052000, C345S080000, C345S084000, C345S204000, C330S051000, C330S069000, C330S253000, C330S257000, C330S260000

Reexamination Certificate

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07916133

ABSTRACT:
A buffer circuit is driven with a low voltage and operates at a high speed has first and second comparators constituted by P channel and N channel MOS transistors provided between an input terminal and an output terminal of a buffer amplifier. A predetermined offset voltage is set for the comparing operation, and a switch circuit turns ON/OFF in response to an output signal from the first comparator and the output signal of the second comparator. A leading up of an output voltage from the buffer amplifier is accelerated by the current flowing from a power source line to the output terminal. The buffer circuit also includes an operation restricting circuit for restricting the comparing operation of the second comparator in a range of a dead band of the transistors.

REFERENCES:
patent: 6897726 (2005-05-01), Tsuchi
patent: 7142055 (2006-11-01), Inokuchi
patent: 7362169 (2008-04-01), Liu et al.
patent: 2004/0075500 (2004-04-01), Inokuchi
patent: 2004-032603 (2004-01-01), None
patent: 2004-140487 (2004-05-01), None
English translation of International Search Report for PCT/JP2005/016307, mailed Dec. 20, 2005.

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