Boots – shoes – and leggings
Patent
1977-08-31
1978-08-29
Ruggiero, Joseph F.
Boots, shoes, and leggings
307221D, 364862, G06G 716
Patent
active
041108353
ABSTRACT:
A charge transfer device capacitive ratio voltage multiplication circuit has been devised which solves the problem of cumulative DC bias offset by adding a DC signal compensation branch to prevent the accumulation of DC offset potential. The circuit can be expanded to form a weighted sum of multiple inputs which does not incur any corresponding DC bias offset, by making the sum of the characteristic capacitances of each of the multiple inputs equal to the characteristic capacitance of the output portion of the charge transfer device circuit. The circuit allows arithmetic operations to be performed on input signals solely in the charge domain without the necessity of converting charge to voltage to charge, thereby avoiding losses, distortions, offsets and a reduction in dynamic range which would otherwise result.
REFERENCES:
patent: 3819953 (1974-06-01), Puckette et al.
patent: 3819954 (1974-06-01), Butler et al.
patent: 3867645 (1975-02-01), Weimer
patent: 3956624 (1976-05-01), Audaire et al.
patent: 4032767 (1977-06-01), Lagnado
Heller -- "Bucket-Brigade Delay Line with Loss Compensation" -- IBM Tech. Disclosure Bulletin, vol. 13, No. 12, May 1971, pp. 3734, 3735.
Dubil James F.
Leighton Howard N.
Wilfinger Raymond J.
Hoel John E.
International Business Machines - Corporation
Ruggiero Joseph F.
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