Electricity: motive power systems – Induction motor systems – Primary circuit control
Reexamination Certificate
2002-03-08
2003-03-04
Leykin, Rita (Department: 2834)
Electricity: motive power systems
Induction motor systems
Primary circuit control
C318S727000, C318S254100, C318S132000, C318S434000
Reexamination Certificate
active
06528968
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a brushless-motor driver for driving a brushless-motor employing a pulse-width-modulation (hereinbelow called “PWM”) driving technique, for use in various fields of, for example, information equipment such as information-processing devices.
2. Description of the Prior Art
Conventionally, there has been used a brushless-motor driver (or motor driving apparatus) of a synchronous rectification type employing a PWM driving method, as disclosed in the Japanese Patent Unexamined Laid-open Publication No. 5-211780. In this conventional driving apparatus which includes drive transistors and paired drive transistors for switchably providing driving current to motor-driving coils, when the drive transistors are in a PWM switching-off state, the paired drive transistors are turned on to flow current therethrough instead of providing a regeneration current to flow through diodes connected in parallel to the respective paired drive transistors when PWM switching is OFF, thereby reducing power dissipation.
FIG. 5
shows a configuration of the conventional brushless-motor driver employing the synchronous rectification PWM driving method. Referring to
FIG. 5
, reference numeral
320
denotes a commutation controller circuit;
340
denotes a synchronous rectification controller circuit;
360
denotes a 2-phase non-overlapping clock circuit; and numerals
4
to
6
and
7
to
9
respectively denote upper drive transistors and lower drive transistors. In addition, numerals
10
to
12
and
13
to
15
respectively denote flywheel diodes;
303
to
304
individually denote comparators; VM denotes a power supply terminal;
305
denotes an RC discharge circuit;
302
denotes a flip-flop;
301
denotes an inverter;
1
to
3
individually denote motor-driving coils; and
80
denotes a current-sensing resistor.
Hereinbelow, a description will be made regarding a PWM driving operation of the conventional brushless-motor driver shown in FIG.
5
.
During an energized phase, one node (for example, node A) is driven high by one of the upper drive transistors
4
to
6
(for example, by the drive transistor
6
). One node (for example, node B) is driven low by one of the lower drive transistors
7
to
9
(for example, by the drive transistor
8
), and the other node (for example, node C) is left floating with both the upper drive transistor
4
and lower drive transistor
7
being OFF. Driving coils are then switched in a commutation sequence that maintains the current in one driving coil during switching.
During a PWM mode, the current is sensed across the current-sensing resistor
80
, and is compared to a reference voltage VREF by the comparator
303
, which determines the maximum current that can be developed in the driving coils
1
,
2
, and
3
. As the current reaches the reference voltage VREF, the comparator
303
flips its output to reset the flip-flop
302
. Thereby, the upper transistors
4
to
6
are switchably controlled through the inverter
301
, the 2-phase non-overlapping clock
360
, and the commutation control circuit
320
to shut off the upper transistors
4
to
6
across all the output nodes A, B, and C.
Simultaneously, the RC discharge circuit
305
is enabled, i.e., is driven to be operable by opening a switch
306
, and the RC discharge circuit
305
creates a time delay during which the upper transistors
4
to
6
are maintained OFF. When the voltage on a capacitor of the RC discharge circuit
305
falls below the reference voltage, the output of the comparator
304
reverses and toggles the flip-flop
302
, thereby turning the upper transistor which corresponds to the phase being driven, back on again. As a result, the current ramps up, that is, the current diagonally rises. Then, a series of this operation cycle is repeated.
Description is continued using an AB phase by way of an example. First, during the ON time, the current ramps up via the driving coils
2
and
3
between the nodes A and B, and flows through the ON-selected upper transistor
6
.
Subsequently, when the upper transistor
6
is shut off in a PWM chop cycle operation, the flywheel diode
15
in parallel with the lower transistor
9
must forward bias to maintain the current in the driving coils
2
and
3
, maintaining the electric potential of the node A high. The lower transistor
8
must remain ON to maintain the node B low.
In addition, when the PWM chop cycle shuts off the upper transistor
6
, the driving coils
2
and
3
turn into a decaying current source, and the energy stored therein must be dissipated. It is provided through a driving current being applied to the lower transistor
9
from a non-rectifying ground return path for the flyback energy in the active driving coil when a drive voltage to the active driving coil is turned off in the PWM mode. Thus, when the upper transistor
6
is shut off, the lower transistor
9
is turned on, and thus the circuit would appear as if the driving coils
2
and
3
were shorted through two resistors, and no diode were provided. The switching operation of the lower transistors
7
to
9
is accomplished with the synchronous-rectification controller circuit
340
in synchronism with signals developed by the commutation control circuit
320
, as below described in detail.
FIG. 6
shows only a portion for one phase of the motor driver circuit as a portion of a control circuitry
300
that is to be provided in the control circuitry
300
shown in FIG.
5
. However, it should be understood that similar circuitry is provided for the remaining phases. The control circuitry
300
is a logic circuit configured such that an upper-driving-transistor driving circuitry and a lower-driving-transistor driving circuitry are driven according to commutation signals on lines
384
and
383
. Other signals to be input to the control circuitry
300
are sent from the flip-flop
302
, as shown in FIG.
5
.
To assure that both the upper and lower driving transistors are not simultaneously active, the 2-phase clock
360
is provided having two output signals V
361
and V
362
which carry exclusively out-of-phase clock signals. The 2-phase clock
360
operates to turn on the upper transistor when the paired lower transistor is turned off, and it operates to turn on the lower transistor when the paired upper transistor is turned off. Hereinbelow, the terminology “synchronous rectification PWM” refers to performance of the above PWM operation of both the paired upper and lower transistors.
Thus, in the above-described conventional example, the control circuitry
300
enables the switching between synchronous-rectification PWM operation and normal linear operation.
However, in the above-described conventional configuration, the PWM-operation pulse-width (duty), which is proportional to a torque command, decreases in the synchronous rectification PWM operation according to variations in the motor revolution, variations in load, or a deceleration command as a torque command. This creates a problem in that the regeneration current flowing across the driving coils reversely flows to a power supply. The reverse current hereinbelow will be referred to as a negative current.
In addition, problems arise in that with the aforementioned negative current flowing, the power supply voltage is increased according to an impedance on the power supply side, thereby causing breakdown in the motor and the motor driver, or a device set including the motor.
Moreover, in order to control the motor at an arbitrary revolution number, the PWM duty proportional to the torque command needs to be varied in the PWM drive mode, and the motor application voltage needs to be varied proportional to the torque command in the linear drive mode. This arises problems in that the circuitry configuration is complicated, causing an increase in cost and other various adverse effects are caused. Furthermore, a problem arises in that the linear operation requires increased power consumption.
SUMMARY OF THE INVENTION
The present inventi
Iwayama Yoshiaki
Seima Toshiaki
Leykin Rita
RatnerPrestia
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