Broadcasting receiver

Details Broadcasting receiver Broadcasting receiver

2006-08-15

2006-08-15

Yenke, Brian P. (Department: 2622)

Television

Receiver circuitry

C348S505000, C348S509000, C348S730000, C348S706000

Reexamination Certificate

active

07092042

ABSTRACT:
A PLL circuit compares a PCR with the output frequency of a voltage controlled oscillator (VCO), and returns a voltage value which is the result of the comparison to the VCO, so that a reference clock corresponding to the PCR is outputted from the VCO. A switch supplies a control voltage from the PLL circuit to the VCO when digital broadcasting is viewed, while feeding a fixed voltage from a fixed voltage power supply to the VCO when analog broadcasting is viewed, to stably output a clock having a frequency of 27 MHz irrespective of the change in the PCR.

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patent: 6995806 (2006-02-01), Al-Araji et al.

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