Broadcast receiver tuning circuit with station memory

Details Broadcast receiver tuning circuit with station memory Broadcast receiver tuning circuit with station memory

1976-12-21

1978-02-21

Griffin, Robert L.

325419, 325457, 325464, H04B 116

Patent

active

040755673

ABSTRACT:
A tuning circuit for a high frequency receiver in which the received frequency is determined by a voltage-controlled oscillator, the present tuning frequency is indicated by a counter connected to the oscillator and producing a representation of each digit of the decimal number identifying the current received frequency, representations of the digits of the number identifying the desired received frequency are fed in via a keyboard and stored in a dynamic memory having a feedback connection from its last memory cell to its first memory cell, the decimal number representations are compared in a comparator to produce a control voltage that brings the oscillator frequency to the desired value, the comparator being capable of comparing only one digit of the number representations at a time and being associated with multiplex circuitry which supplies the digits of corresponding significance thereto in sequence, starting with the most significant digit, and a station tuning memory is provided to store representations of the frequency and band of selected broadcast stations and is connected by a linkage circuit to the dynamic memory to permit transfer in either direction between the memories of station frequency and band representations.

REFERENCES:
patent: 3961266 (1976-06-01), Tanaka
patent: 3965336 (1976-06-01), Grohmann
patent: 3988681 (1976-10-01), Schurmann

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