Broadcast demap for deallocating memory pages in a multiprocesso

Details Broadcast demap for deallocating memory pages in a multiprocesso Broadcast demap for deallocating memory pages in a multiprocesso

1994-07-29

1996-03-05

Swann, Tod R.

Multiplex communications

Wide area network

Packet switching

395417, 370 941, 364DIG1, 3642434, 3642564, 36424611, 364DIG2, 36494208, 36496425, G06F 1212, H04J 324

Patent

active

054974801

ABSTRACT:
A method and apparatus for removing a page table entry from a plurality of translation lookaside buffers ("TLBs") in a multiprocessor computer system. The multiprocessor computer system includes at least two processors coupled to a packet-switched bus. Page table entries are removed from a plurality of TLBs in the multiprocessor computer system by first broadcasting a demap request packet on the packet-switched bus in response to one of the processors requesting that a page table entry be removed from its associated TLB. The demap request packet includes a virtual address and context information specifying this page table entry. Controllers reply to the demap request packet by sending a first reply packet to the controller that sent the original demap request packet to indicate receipt of the demap request packet. If a controller removes the page table entry from its associated TLB, that controller sends a second demap reply packet to indicate that the page table entry has been removed from its associated TLB.

REFERENCES:
patent: 4525778 (1985-06-01), Cane
patent: 4733348 (1988-03-01), Hiraoka et al.
patent: 4779188 (1988-10-01), Gum et al.
patent: 5195089 (1993-03-01), Sindhu et al.
The SPARC.TM. Architecture Manual, Version 8 (Dec. 11, 1990) Sun Microsystems, Inc.; Mountain View, CA; pp. 237-255.

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