Broadband input buffered ATM switch

Details Broadband input buffered ATM switch Broadband input buffered ATM switch

1991-10-03

1993-08-31

Safourek, Benedict V.

Multiplex communications

Wide area network

Packet switching

370 941, 370 59, H04L 1256

Patent

active

052415368

ABSTRACT:
Broadband ATM switches for switching ATM packetized data in timeslots are disclosed. In one embodiment, the switch includes input buffer, a space switch for connecting input ports and output ports at successive timeslots and a system scheduler. The timeslot utilization processing is carried out by using a content addressable memory. A bit map is provided for registering the timeslot utilization of the input ports and the output ports. An encoder determines the earliest commonly available timeslot for connecting input ports and their requested output ports. There is further disclosed an architecture in which groups of input ports share common buffer memories and in which the system scheduler processes grouped inputs, thus taking advantage of the architecture's similar characteristics and advantages to those of the common memory switch.

REFERENCES:
patent: 4922488 (1990-05-01), Niestegge
patent: 4947387 (1990-08-01), Knorpp et al.
patent: 5126999 (1992-06-01), Munter et al.
patent: 5130975 (1992-07-01), Akata
patent: 5157654 (1992-10-01), Cisneros
"Network, Transport and Switching Integration for Broadband Communications" by J. Y. Hui, IEEE Network, Mar. 89, pp. 40-51.
"Input Versus Output Queueing on a Space-Division Packet Switch" by M. J. Karol et al, IEEE Transactions on Communications, vol. COM-35, No. 12, Dec. 87, pp. 1347-1356.
"Large-Scale ATM Multi-stage Switching Network with Shared Buffer Memory Switches" by Y. Sakurai et al, IEEE Communications Magazine, Jan. 91, pp. 90-96.

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